LTC3251_15 Datasheet, PDF (12/16 Pages) Linear Technology – 500mA High Efficiency, Low Noise, Inductorless Step-Down DC/DC Converter

LTC3251/
LTC3251-1.2/LTC3251-1.5
U
OPERATIO (Refer to Block Diagram)
temperature range, the 1µF, 10V, X5R or X7R will provide
more capacitance than the 4.7µF, 10V, Y5V. The capacitor
manufacturer’s data sheet should be consulted to deter-
mine what value of capacitor is needed to ensure mini-
mum capacitance values are met over operating tempera-
ture and bias voltage.
Below is a list of ceramic capacitor manufacturers and
how to contact them:
AVX
Kemet
Murata
Taiyo Yuden
TDK
www.avxcorp.com
www.kemet.com
www.murata.com
www.t-yuden.com
www.tdk.com
Layout Considerations
Due to the high switching frequency and transient currents
produced by the LTC3251, careful board layout is neces-
sary for optimal performance. A true ground plane and
short connections to all capacitors will improve perfor-
mance and ensure proper regulation under all conditions.
Figure 6 shows the recommended layout configuration.
LTC3251 COMPONENTS NOT USED ON
C_I
THE LTC3251-1.2 OR LTC3251-1.5
1µF
R_B
V_IN
C1
1µF
GND
R_A
C2
1µF
C_A
5pF
V_OUT
C_O
10µF
3251 F06
Figure 6. Recommended Layout
The flying capacitor pins C1⁺, C1^–, C2⁺, C2^– will have very
high edge rate wave forms. The large dv/dt on these pins
can couple energy capacitively to adjacent printed circuit
board runs. Magnetic fields can also be generated if the
flying capacitors are not close to the part (i.e., the loop area
is large). To decouple capacitive energy transfer, a Faraday
shield may be used. This is a grounded PC trace between
the sensitive node and the IC’s pins. For a high quality AC
ground, it should be returned to a solid ground plane that
extends all the way to the part. Keep the FB trace of the
LTC3251 away from or shielded from the flying capacitor
traces or degraded performance could result.
Thermal Management
If the junction temperature increases above approximately
160°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
is recommended. Connecting the 10-pin MSE paddle
directly to a ground plane, and maintaining a solid ground
plane under the device on one or more layers of the PC
board, can reduce the thermal resistance of the package
and PC board considerably. Using this method a θ_JA of
40°C/W should be achieved. The actual power dissipated
by the LTC3251 (PD) can be calculated by the following
equation:
PD
=
⎛
⎝⎜
V_IN
2
⎞
– V_{OUT⎠⎟}
I_OUT
Power Efficiency
The power efficiency (η) of the LTC3251 family is approxi-
mately double that of a conventional linear regulator. This
occurs because the input current for a 2-to-1 step-down
charge pump is approximately half the output current. For
an ideal 2-to-1 step-down charge pump the power effi-
ciency is given by:
η ≡ ^POUT = ^{VOUT •IOUT} = ^2VOUT
P_IN
V_IN
•
1
2
I_OUT
V_IN
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