LTC1605-2_15 Datasheet, PDF (12/20 Pages) Linear Technology – Single Supply 16-Bit, 100ksps, Sampling ADCs

LTC1605-1/LTC1605-2
APPLICATIONS INFORMATION
Dynamic Performance
FFT (Fast Fourier Transform) test techniques are used to
test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT
algorithm, the ADC’s spectral content can be examined
for frequencies outside the fundamental. Figure 11 shows
a typical LTC1605-2 FFT plot which yields a SINAD of
87dB and THD of –101.1dB.
Signal-to-Noise Ratio
The Signal-to-Noise and Distortion Ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental
input frequency to the RMS amplitude of all other fre-
quency components at the A/D output. The output is band
limited to frequencies from above DC and below half the
sampling frequency. Figure 11 shows a typical SINAD of
87dB with a 100kHz sampling rate and a 1kHz input.
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
f_SAMPLE = 100kHz
f_IN = 1kHz
SINAD = 87dB
THD = 101.1dB
SNR = 87.2dB
5 10 15 20 25 30 35 40 45 50
FREQUENCY (kHz)
1605-1/2 G07/F11
Figure 11. LTC1605-2 Nonaveraged 4096-Point FFT Plot
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamen-
tal itself. The out-of-band harmonics alias into the fre-
quency band between DC and half the sampling fre-
quency. THD is expressed as:
where V₁ is the RMS amplitude of the fundamental
frequency and V₂ through V_N are the amplitudes of the
second through Nth harmonics.
Board Layout, Power Supplies and Decoupling
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1605-1/LTC1605-2, a printed
circuit board is required. Layout for the printed circuit
board should ensure the digital and analog signal lines
are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.
Figures 12 through 15 show a layout for a suggested
evaluation circuit which will help obtain the best perfor-
mance from the 16-bit ADC. Additional information re-
garding the evaluation circuit and Gerber files for the PC
board layout are available from Linear Technology or
your local sales office. Pay particular attention to the
design of the analog and digital ground planes. The
DGND pin of the LTC1605-1/LTC1605-2 can be tied to the
analog ground plane. Placing the bypass capacitor as
close as possible to the power supply, the reference and
reference buffer output is very important. Low imped-
ance common returns for these bypass capacitors are
essential to low noise operation of the ADC, and the PC
track width for these lines should be as wide as possible.
Also, since any potential difference in grounds between
the signal source and ADC appears as an error voltage in
series with the input signal, attention should be paid to
reducing the ground circuit impedance as much as
possible. The digital output latches and the onboard
sampling clock have been placed on the digital ground
plane. The two ground planes are tied together at the
power supply ground connection.
THD
=
20log^√V22
+
V₃₂
+ V₄₂
V₁
...
+
V_N2
12