LTC1435A_15 Datasheet, PDF (12/20 Pages) Linear Technology – High Efficiency Low Noise Synchronous Step-Down Switching Regulator

LTC1435A
APPLICATIONS INFORMATION
The external resistive divider is connected to the output as
shown in Figure 5 allowing remote voltage sensing.
V_OSENSE
LTC1435A
SGND
1.19V ≤ V_OUT ≤ 9V
R2
100pF _R1
1435A F05
Figure 5. Setting the LTC1435A Output Voltage
Run/ Soft Start Function
The RUN/SS pin is a dual purpose pin that provides the soft
start function and a means to shut down the LTC1435A. Soft
start reduces surge currents from V_IN by gradually increas-
ing the internal current limit. Power supply sequencing can
also be accomplished using this pin.
An internal 3µA current source charges up an external
capacitor C_SS. When the voltage on RUN/SS reaches 1.3V
the LTC1435A begins operating. As the voltage on RUN/SS
continues to ramp from 1.3V to 2.4V, the internal current
limit is also ramped at a proportional linear rate. The cur-
rent limit begins at approximately 50mV/R_SENSE (at V_RUN/
SS ^{= 1.3V) and ends at 150mV/R}SENSE ^(VRUN/SS ^{> 2.7V). The}
output current thus ramps up slowly, charging the output
capacitor. If RUN/SS has been pulled all the way to ground
there is a delay before starting of approximately 500ms/µF,
followed by an additional 500ms/µF to reach full current.
t_DELAY = 5(10 ⁵)C_SS Seconds
Pulling the RUN/SS pin below 1.3V puts the LTC1435A into
a low quiescent current shutdown (I_Q < 25µA). This pin can
be driven directly from logic as shown in Figure 6. Diode
D1 in Figure 6 reduces the start delay but allows C_SS to ramp
up slowly for the soft start function; this diode and C_SS can
be deleted if soft start is not needed. The RUN/SS pin has
an internal 6V Zener clamp (See Functional Diagram).
3.3V OR 5V
RUN/SS
D1
C_SS
RUN/SS
C_SS
1435 F06
Figure 6. RUN/SS Pin Interfacing
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the worst-
case dissipation for either MOSFET occurs with a short-
circuited output, when the synchronous MOSFET conducts
the current limit value almost continuously. In most appli-
cations this will not cause excessive heating, even for
extended fault intervals. However, when heat sinking is at
a premium or higher R_DS(ON) MOSFETs are being used,
foldback current limiting should be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diode
D_FB between the output and the I_TH pin as shown in the
Functional Diagram. In a hard short (V_OUT = 0V) the cur-
rent will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applica-
tions with regulated output voltages of 1.8V or greater.
SFB Pin Operation
When the SFB pin drops below its ground referenced 1.19V
threshold, continuous mode operation is forced. In continu-
ous mode, the large N-channel main and synchronous
switches are used regardless of the load on the main output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB pin provides a means to
regulate a flyback winding output. Continuous synchronous
operation allows power to be drawn from the auxiliary
windings without regard to the primary output load. The SFB
pin provides a way to force continuous synchronous op-
eration as needed by the flyback winding.
The secondary output voltage is set by the turns ratio of the
transformer in conjunction with a pair of external resistors
returned to the SFB pin as shown in Figure 4a. The second-
ary regulated voltage, V_SEC, in Figure 4a is given by:
V_SEC ≈ ₍N + 1₎V_OUT > 1.19^{}1+ ^{RR65}
where N is the turns ratio of the transformer and V_OUT is
the main output voltage sensed by V_OSENSE.
Minimum On-Time Considerations
Minimum on-time, t_ON(MIN), is the smallest amount of time
that the LTC1435A is capable of turning the top MOSFET
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