LT6350 Datasheet, PDF (12/28 Pages) Linear Technology – Low Noise Single-Ended to Differential Converter/ADC Driver

LT6350
OPERATION
The LT6350 is a low noise single-ended to differential
converter /ADC driver. It converts a high or low impedance,
single-ended input signal to a low impedance, balanced
differential output suitable for driving high performance
differential sucessive approximation register (SAR) ADCs.
The closed loop –3dB bandwidth for the typical gain-of-two
configuration is 33MHz.
The LT6350 uses a two op amp topology as shown in
the Block Diagram: at the input is one fully uncommitted
op amp with both inputs and output brought out to pins.
This is followed by an op amp internally hardwired and
optimally compensated as a unity-gain inverter with its
input connected to the output of the first op amp. The
noninverting input of the inverting op amp is brought out to
a pin and is used to set the output common mode voltage
level. The outputs of the two op amps are therefore 180°
out-of-phase and provide a low impedance differential
drive for differential-input analog to digital converters.
The outputs of the LT6350 can swing rail-to-rail and can
source or sink a transient 45mA of current. The outputs
are designed to drive 40pF to ground or 20pF differentially.
Load capacitances larger than 40pF should be decoupled
from each output with at least 25Ω of series resistance.
The LT6350 features very low noise op amps to support
signal-to-noise ratios >110dB.
BASIC CONNECTIONS
A typical use of the LT6350 is to convert a high impedance,
single-ended input signal into a low impedance differential
output. The configuration for such an application is shown
in Figure 2. Here, the input op amp is wired as a non-
inverting buffer with a high input impedance at +IN1. At
the outputs, V_OUT1 follows the input, and V_OUT2 provides
an inverted copy of V_OUT1 for an overall differential gain
of two. The input op amp has a rail-to-rail input stage, and
both outputs are rail-to-rail, typically swinging to within
55mV of the rails at each output in this configuration
allowing 8V_P-P differential outputs from a single 5V rail.
This provides a simple interface to differential input ADCs
that accept a mid-rail input common mode voltage.
4.5V
V_IN
0.5V
5V
0.1μF
+ ^VIN
– _0.5V-4.5V
+IN1
SHDN V⁺
+
–
LT6350 –
+
–IN1
+IN2
V^–
OUT2
OUT1
2.5V
0.1μF
Figure 2. Basic Connections
V_OUT2
4.5V
0.5V
V_OUT1
4.5V
0.5V
6350 F02
DESIGN EQUATIONS AND ALTERNATIVE CONNECTIONS
Because the input op amp presents its output and both
its inputs to LT6350 pins, alternative configurations are
possible. Consider the general configuration shown in
Figure 3.
Ordinary op amp analysis gives the equations for V_OUT1
and V_OUT2 given the input voltages V1, V2, V_IN and V_A:
V_OUT1 = V_IN • (1+R_F/R_G) – V1 • (R_F/R_G)
V_OUT1 = V_A • (1+R_F/R_G) + V1
V_OUT2 = –V_OUT1 + 2 • V2
If we define the differential and common mode output
voltages as:
V_OUTDIFF ≡ V_OUT1 – V_OUT2
and
V_OUTCM ≡ (V_OUT1 + V_OUT2)/2,
then combining the expressions for V_OUT1 and V_OUT2 with
the definitions gives the resulting differential and common
mode output voltages:
V_OUTDIFF = 2 • (V_IN• (1+R_F/R_G)–V1 • (R_F/R_G)–V2) (1)
V_OUTDIFF = 2 • (V_A • (1+R_F/R_G) + V1 – V2)
(2)
V_OUTCM = V2
(3)
6350f
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