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LTC6802-2 Datasheet, PDF (11/34 Pages) Linear Technology – Multicell Addressable Battery Stack Monitor
Operation
LTC6802-2
LTC6802-2
V+ IC #2 CSBI
+
C12
SDO
S12
SDI
+
C11
SCKI
S11
A3
+
C10
A2
S10
A1
+
C9
A0
S9
GPIO2
+
C8
GPIO1
S8
WDTB
+
C7
MMB
S7
TOS
+
C6
VREG
S6
VREF
+
C5
VTEMP2
S5
VTEMP1
+
C4
NC
S4
V–
+
C3
S1
S3
C1
+
C2
S2
+
IC #3 TO IC #7
V2–
V1–
OE2 OE1
ADDRESS 1
V2–
V1–
V2+
V1+
3V
DIGITAL
ISOLATOR
BATTERY
POSITIVE
350V
+
+
+
+
+
+
+
+
+
+
+
+
LTC6802-2
V+ IC #8 CSBI
C12
SDO
S12
SDI
C11
SCKI
S11
A3
C10
A2
S10
A1
C9
A0
S9
GPIO2
C8
GPIO1
S8
WDTB
C7
MMB
S7
TOS
C6
VREG
S6
VREF
C5
VTEMP2
S5
VTEMP1
C4
NC
S4
V–
C3
S1
S3
C1
C2
S2
V2–
V1–
OE2 OE1
ADDRESS 15
V2–
V1–
V2+
V1+
3V
DIGITAL
ISOLATOR
LTC6802-2
V+ IC #1 CSBI
+
C12
SDO
S12
SDI
+
C11
SCKI
S11
A3
+
C10
A2
S10
A1
+
C9
A0
S9
GPIO2
+
C8
GPIO1
S8
WDTB
+
C7
MMB
S7
TOS
+
C6
VREG
S6
VREF
+
C5
VTEMP2
S5
VTEMP1
+
C4
NC
S4
V–
+
C3
S1
S3
C1
+
C2
S2
V2–
V1–
OE2 OE1
ADDRESS 0
V2–
V1–
V2+
V1+
3V
DIGITAL
ISOLATOR
3V
MISO MPU
CS
MOSI
CLK
MODULE
IO
+
68022 F01
Figure 1. 96-Cell Battery Stack, Isolated Interface. In this Diagram the Battery Negative is Isolated from Module Ground.
Opto-Couplers or Digital Isolators Allow Each IC to be Addressed Individually. This is a Simplified Schematic Showing
the Basic Multi-IC Architecture
between C2 and C4 after several cycles of measuring cells
B3 and B4. Thus the measurements for B3 and B4 may
indicate a valid cell voltage when in fact the exact state of
B3 and B4 is unknown.
To reliably detect an open connection, the command
STOWAD is provided. With this command, two 100µA
current sources are connected to the ADC inputs and
turned on during all cell conversions. Referring again to
Figure 3, with the STOWAD command, the C3 pin will be
pulled down by the 100µA current source during the B3
cell measurement AND during the B4 cell measurement.
This will tend to decrease the B3 measurement result and
increase the B4 measurement result relative to the normal
STCVAD command. The biggest change is observed in the
68022fa
11