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LTC6605-10_15 Datasheet, PDF (11/20 Pages) Linear Technology – Dual Matched 10MHz Filter with Low Noise, Low Distortion Differential Amplifier
LTC6605-10
APPLICATIONS INFORMATION
Setting the passband gain (GAIN = R2/R1) only requires
choosing a value for R1, since R2 is a fixed internal 400Ω.
Therefore, the following three gains can be easily configured
without external components:
Table 1. Configuring the Passband Gain Without External
Components
GAIN GAIN (dB) R1 (Ω)
(V/ V)
INPUT PINS TO USE
1
0
400 Drive the 400Ω Resistors. Tie
the 100Ω Resisters Together.
4
12
100 Drive the 100Ω Resistors.
5
14
80 Drive the 400Ω and 100Ω
Resistors in Parallel.
Figure 4 shows three filter configurations with an
f–3dB = 9.7MHz, without any external components. These
filters have a Q = 0.61, which is an almost ideal Bessel
characteristic with linear phase.
Figure 5 shows three filter configurations that use some
external resistors, and are tailored for a very flat ±0.7dB
11.2MHz passband.
Many other configurations are possible by using the equa-
tions in Figure 3. For example, external resistors can be
added to modify the value of R1 to configure GAIN ≠ 1. For
an even more flexible filter IC with similar performance,
consider the LTC6601.
The resonant frequency, fO, is independent of R1, and
therefore independent of the gain. For any LTC6605-10
filter configuration that conforms to Figure 3, the fO is
fixed at 11.36MHz. The f–3dB frequency depends on the
combination of fO and Q. For any specific gain, Q is adjusted
by the selection of R4.
Setting the f–3dB Frequency
Using an external resistor (REXT), the f–3dB frequency is ad-
justable in the range of 9.7MHz to 14.0MHz (see Figure 3).
The minimum f–3dB is set for REXT equal to 0Ω and the
maximum f–3dB is arbitrarily set for a maximum passband
gain peak less than 1dB.
Table 2. REXT Selection GAIN = 1,
R1 = 400Ω, R4A = R4B = 100Ω
f–3dB (MHz)
REXT Ω
9.7
0
10
5.11
10.5
13.3
11
22.1
11.5
31.6
12
41.2
12.5
52.3
13
64.9
13.5
80.6
14
97.6
BIAS Pin
Each channel of the LTC6605-10 has a BIAS pin whose
function is to tailor both performance and power. The BIAS
pin can be modeled as a voltage source whose potential
is 1.15V above the V– supply and that has a Thevenin
equivalent resistance of 150k. This three-state pin has fixed
logic levels relative to V– (see the Electrical Characteristics
table), and can be driven by any external source that can
drive the BIAS pin’s equivalent input impedance.
If the BIAS pin is tied to the positive supply, the part is
in a fully active state configured for highest performance
(lowest noise and lowest distortion).
If the BIAS pin is floated (left unconnected), the part is in a
fully active state, but with amplifier currents reduced and
performance scaled back to preserve power consumption.
Care should be taken to limit external leakage currents
to this pin to under 1μA to avoid putting the part in an
unexpected state.
If the BIAS pin is tied to the most negative supply (V–),
the part is in a low power shutdown mode with amplifier
outputs disabled. In shutdown, all internal biasing current
sources are shut off, and the output pins each appear as
open collectors with a non-linear capacitor in parallel and
steering diodes to either supply. Because of the non-linear
capacitance, the outputs can still sink and source small
amounts of transient current if exposed to significant
voltage transients. Using this function to wire-OR outputs
together is not recommended.
660510f
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