LTC3602_15 Datasheet, PDF (11/20 Pages) Linear Technology – 2.5A, 10V, Monolithic Synchronous Step-Down Regulator

LTC3602
APPLICATIONS INFORMATION
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is less than INTV_CC
by 1V or more, Burst Mode operation is enabled. During
Burst Mode operation, the voltage on the SYNC/MODE
pin determines the burst clamp level. This level sets the
minimum peak inductor current, I_BURST, for each switching
cycle according to the following equation:
V_BURST =
I_BURST
6A / V
+
0.42V
V_BURST is the voltage on the SYNC/MODE pin. I_BURST can
be programmed in the range of 0A to 3.5A, which cor-
responds to a V_BURST range of 0.42V to 1V. As the output
load current drops, the peak inductor current decreases
to keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I_BURST, the burst clamp will force the peak inductor
current to remain equal to I_BURST regardless of further
reductions in the load current. Since the average inductor
current is therefore greater than the output load current,
the voltage on the I_TH pin will decrease. When the I_TH
voltage drops to 330mV, sleep mode is enabled in which
both power MOSFETs are shut off along with most of the
circuitry to minimize power consumption. All circuitry is
turned back on and the power MOSFETs begin switching
again when the output voltage drops out of regulation. The
value for I_BURST is determined by the desired amount of
output voltage ripple. As the value of I_BURST increases, the
sleep time between pulses and the output voltage ripple
increases. The burst clamp voltage, V_BURST, can be set
by a resistor divider from the INTV_CC pin. Alternatively,
the SYNC/MODE pin may be tied directly to the V_FB pin to
set V_BURST = 0.6V (I_BURST = 1A), or through an additional
divider resistor (R3) to set V_BURST = 0.46V to 0.6V (see
Figure 2).
Pulse-skipping, which is a compromise between low output
voltage ripple and efficiency, can be implemented by con-
necting the SYNC/MODE pin to ground. This sets I_BURST to
0A. In this condition, the peak inductor current is limited by
the minimum on-time of the current comparator and the
lowest output voltage ripple is achieved while still opera-
ting discontinuously. During very light output loads,
pulse-skipping allows only a few switching cycles to be
skipped while maintaining the output voltage in regulation.
Frequency Synchronization
The LTC3602’s internal oscillator can be synchronized
to an external clock signal. During synchronization, the
top MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 3MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
the R_T resistor. Because slope compensation is generated
by the oscillator’s internal ramp, the external frequency
should be set 25% higher than the frequency set by the
R_T resistor to ensure that adequate slope compensation
is present. When synchronized, the LTC3602 will operate
in pulse-skipping mode.
INTV_CC Regulator
The LTC3602 features an integrated P-channel low dropout
linear regulator (LDO) that supplies power to the INTV_CC
supply pin from the PV_IN pin. This LDO supply has been
designed to deliver up to 35mA of load current for the
powering of the internal gate drivers and other internal
circuitry. A small external load may also be applied provided
that the total current from the INTV_CC supply does not
exceed 35mA. The INTV_CC pin should be bypassed with
no less than a 0.22μF ceramic capacitor. A 1μF ceramic
capacitor is suitable for most applications.
INTV_CC
LTC3602
R2
SYNC/MODE
R1
SGND
V_BURST = 0.46V TO 1V
FB
LTC3602
R2
V_OUT
R3 (OPTIONAL)
SYNC/MODE
R1
SGND
3602 F02
V_BURST = 0.46V TO 0.6V
Figure 2. Programing the Burst Clamp
3602fb
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