LTC3499 Datasheet, PDF (11/16 Pages) Linear Technology – 750mA Synchronous Step-Up DC/DC Converters with Reverse-Battery Protection

LTC3499/LTC3499B
APPLICATIO S I FOR ATIO
Low ESR capacitors should be used to minimize output
voltage ripple. A 4.7µF to 10µF output capacitor is suffi-
cient for most applications and should be placed as close
to V_OUT as possible. Larger values may be used to obtain
even lower output ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges.
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the input source and reduces input switching noise.
Ceramic capacitors are a good choice for input decoupling
due to their low ESR and ability to withstand reverse
voltage (i.e. non-polar nature). The capacitor should be
located as close as possible to the device. In most appli-
cations a 2.2µF input capacitor is sufficient. Larger values
may be used without limitations. Table 2 shows a list of
several ceramic capacitor manufacturers.
Table 2. Capacitor Vendor Information
SUPPLIER
WEB SITE
AVX
www.avxcorp.com
Murata
www.murata.com
TDK
www.component.tdk.com
Taiyo Yuden
www.t-yuden.com
Thermal Considerations
For the LTC3499/LTC3499B to deliver full output power, it
is imperative that a good thermal path be provided to
dissipate the heat generated within the package. For the
DFN package, this can be accomplished by taking advan-
tage of the large thermal pad on the underside of the
device. It is recommended that multiple vias in the printed
circuit board be used to conduct heat away from the part
and into a copper plane with as much area as possible. If
the junction temperature continues to rise, the part will go
into thermal shutdown where switching will stop until the
temperature drops.
Closing the Feedback Loop
The LTC3499/LTC3499B utilize current mode control,
with internal slope compensation. Current mode control
eliminates the 2nd order filter due to the inductor and
output capacitor exhibited in voltage mode controllers,
thus simplifying it to a single pole filter response. The
product of the modulator control to output DC gain and the
error amp open loop gain gives the DC gain of the system:
G_DC
=
G_CONTROL
•
G_EA
•
V_OUT
•
V_REF
G_{CURRENT _ SENSE}
G_CONTROL
=
2
•
V_IN
I_OUT
,
( ) ^GEA
~ 1000,
G_{CURRENT _ SENSE}
=
1
R_{DS ON}
The output filter pole is given by:
( ) ^{fFILTER_POLE =}
I_OUT
π • V_OUT • C_OUT
where C_OUT is the output filter capacitor.
The output filter zero is given by:
( ) ^{fFILTER_ ZERO =}
1
2 • π • R_ESR • C_OUT
where R_ESR is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane (RHP) zero, given by:
f_RPHZ
=
(2
•
π
V_IN2
• I_OUT • V_OUT
•L)
3499f
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