LTC3402_15 Datasheet, PDF (11/16 Pages) Linear Technology – 2A, 3MHz Micropower Synchronous Boost Converter

LTC3402
APPLICATIO S I FOR ATIO
signal is attenuated with resistor R6 and is given by the
following relationship:
R6
≈
⎛
⎝⎜
V_FVFO•_UR_T5••_ΔV_IINOU•_T1.5⎞⎠⎟
–
R5
where ΔI_OUT = load current change.
V_IN
LTC3402
3
4
V_IN
SW
10
SHDN
7
V_OUT
2
8
MODE/SYNC FB
6
PGOOD
9
V_C
1
5
C3
R_t
GND
R5
V_OUT
The output filter zero is given by:
f_FILTERZERO
=
2
•
π
•
1
R_ESR
•
C_OUT
Hz
where R_ESR is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane zero (RHP) and is given by:
2
f_RHPZ =
V_IN R_O
2
Hz
2πLV_O
At heavy loads this gain increase with phase lag can occur
at a relatively low frequency. The loop gain is typically
rolled off before the RHP zero frequency.
The typical error amp compensation is shown in Figure 4.
The equations for the loop dynamics are as follows:
LOAD FEED
FORWARD
SIGNAL
C5
R6 ^3.3nF
V_FF
Figure 3
3402 F03
Closing the Feedback Loop
The LTC3402 used current mode control with internal
adaptive slope compensation. Current mode control elimi-
nates the 2nd order filter due to the inductor and output
capacitor exhibited in voltage mode controllers, and sim-
plifies it to a single-pole filter response. The product of the
modulator control to output DC gain plus the error amp
open-loop gain equals the DC gain of the system.
G_DC = G_{CONTROLOUTPUT} • G_EA
G_CONTROL
=
2 • V_IN
I_OUT
,
G_EA
≈
2000
The output filter pole is given by:
f_FILTERPOLE
=
π
•
I_OUT
V_OUT • C_OUT
Hz
where C_OUT is the output filter capacitor.
f_POLE1
≈
2
•
π
•
20
1
• 10⁶
Hz
• C_C1
which is extremelyclose to DC
f_ZERO1
=
2
•
π
•
1
R_Z
•
C_C1
Hz
f_POLE2
≈
2
•
π
1
• R_Z
•
C_C2
Hz
Refer to AN76 for more closed-loop examples.
ERROR
AMP
1.25V
FB
8
V_C
9
C_C1
R_Z
Figure 4
V_OUT
R1
R2
C_C2
3402 F04
3402fb
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