LTC3219_15 Datasheet, PDF (11/20 Pages) Linear Technology – 250mA Universal Nine Channel LED Driver

LTC3219
OPERATION
I²C Interface
The LTC3219 communicates with a host (master) using
the standard I²C 2-wire interface. The Timing Diagram
(Figure 2) shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources, such as the LTC1694 SMBus accelerator,
are required on these lines.
The LTC3219 is a receive-only (slave) device.
Write Word Protocol Used by the LTC3219
1
7
11
8
1
8
11
S Slave Address Wr A *Sub-Address A Data Byte A P**
S = Start Condition, Wr = Write Bit = 0, A = Acknowledge,
P = Stop Condition
*The sub-address uses only the first four bits, D0, D1, D2 and D3
**Stop can be delayed until all of the data registers have been written
ADDRESS
WR
00 110110
SUB-ADDRESS
S7 S6 S5 S4 S3 S2 S1 S0
DATA BYTE
76543210
START
SDA
0 0 1 1 0 1 1 0 ACK S7 S6 S5 S4 S3 S2 S1 S0 ACK 7 6 5 4 3 2 1 0 ACK
STOP
SCL
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 89 1 2 3 4 5 6 7 8 9
3219 FO2
Figure 2. Bit Assignments
SDA
t_LOW
t_{SU, DAT}
SCL
t_{HD, STA}
START
CONDITION
t_HIGH
t_r
t_f
t_{HD, DAT}
t_{SU, STA}
t_{HD, STA}
t_SP
REPEATED START
CONDITION
Figure 3. Timing Parameters
t_BUF
t_{SU, STO}
3219 F03
STOP
CONDITION
START
CONDITION
3219fa
11