LTC2453_1 Datasheet, PDF (11/18 Pages) Linear Technology – Ultra-Tiny, Differential, 16-Bit ΔΣ ADC With I2C Interface

LTC2453
APPLICATIONS INFORMATION
Driving V_CC and GND
In relation to the V_CC and GND pins, the LTC2453 combines
internal high frequency decoupling with damping elements,
which reduce the ADC performance sensitivity to PCB
layout and external components. Nevertheless, the very
high accuracy of this converter is best preserved by careful
low and high frequency power supply decoupling.
A 0.1μF, high quality, ceramic capacitor in parallel with a
10μF ceramic capacitor should be connected between the
V_CC and GND pins, as close as possible to the package.
The 0.1μF capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path, starting from the converter V_CC pin, passing through
these two decoupling capacitors, and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Very low impedance ground and power planes, and star
connections at both V_CC and GND pins, are preferable.
The V_CC pin should have three distinct connections: the
REF⁺
V_CC
I_LEAK
I_LEAK
R_SW
15k
(TYP)
V_CC
R_SW
I_LEAK
15k
(TYP)
IN⁺
I_LEAK
V_CC
R_SW
I_LEAK
15k
(TYP)
IN–
I_LEAK
C_EQ
0.35pF
(TYP)
REF^–
V_CC
I_LEAK
I_LEAK
R_SW
15k
(TYP)
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first to the decoupling capacitors described above, the
second to the ground return for the input signal source,
and the third to the ground return for the power supply
voltage source.
Driving REF⁺ and REF^–
A simplified equivalent circuit for REF⁺ and REF^– is shown
in Figure 8. Like all other A/D converters, the LTC2453 is
only as accurate as the reference it is using. Therefore, it
is important to keep the reference line quiet by careful low
and high frequency power supply decoupling.
The LT6660 reference is an ideal match for driving the
LTC2453’s REF⁺ pin. The LTC6660 is available in a 2mm ×
2mm DFN package with 2.5V, 3V, 3.3V and 5V options.
A 0.1μF, high quality, ceramic capacitor in parallel with
a 10μF ceramic capacitor should be connected between
the REF⁺/REF^– and GND pins, as close as possible to the
package. The 0.1μF capacitor should be placed closest
to the ADC.
Driving V_IN+ and V_IN–
The input drive requirements can best be analyzed using
the equivalent circuit of Figure 9. The input signal V_SIG is
connected to the ADC input pins (IN⁺ and IN^–) through
an equivalent source resistance R_S. This resistor includes
both the actual generator source resistance and any
additional optional resistors connected to the input pins.
R_S
SIG^{+ +–}
R_S
SIG^{– +–}
V_CC
I_LEAK
IN⁺
R_SW
15k
(TYP)
C_IN
I_LEAK
C_PAR
C_EQ
0.35pF
(TYP)
V_CC
I_LEAK
IN^–
R_SW
15k
(TYP)
C_IN
I_LEAK
C_PAR
C_EQ
0.35pF
(TYP)
I_CONV
I_CONV
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Figure 8. LTC2453 Analog Input/Reference Equivalent Circuit
Figure 9. LTC2453 Input Drive Equivalent Circuit
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