LTC1657L_15 Datasheet, PDF (11/16 Pages) Linear Technology – Parallel 16-Bit Rail-to-Rail Micropower DAC

LTC1657/LTC1657L
APPLICATIO S I FOR ATIO
Rail-to-Rail Output Considerations
In any rail-to-rail DAC, the output swing is limited to
voltages within the supply range.
If the DAC offset is negative, the output for the lowest
codes limits at 0V as shown in Figure 1b.
Similarly, limiting can occur near full scale when the REF
pin is tied to V_CC/2. If V_REF = V_CC/2 and the DAC full-scale
error (FSE) is positive, the output for the highest codes
limits at V_CC as shown in Figure 1c. No full-scale limiting
can occur if V_REF is less than (V_CC – FSE)/2.
Offset and linearity are defined and tested over the region
of the DAC transfer function where no output limiting can
occur.
V_CC
OUTPUT
VOLTAGE
V_REF = V_CC/2
POSITIVE
FSE
V_CC
V_REF = V_CC /2
OUTPUT
VOLTAGE
INPUT CODE
(c)
OUTPUT
VOLTAGE
0
32768
65535
INPUT CODE
(a)
0V
NEGATIVE
OFFSET
INPUT CODE
(b)
1657 F02
Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative
Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When V_REF = V_CC/2
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