LTC1654_1 Datasheet, PDF (11/16 Pages) Linear Technology – Dual 14-Bit Rail-to-Rail DAC in 16-Lead SSOP Package

LTC1654
APPLICATIO S I FOR ATIO
Rail-to-Rail Output Considerations
Rail-to-rail DACs take full advantage of the supply range
available to them, but cannot produce output voltages
above V_CC or below ground. See Figure 2a.
If REFLO is tied to GND, the output for the lowest codes
may limit at 0V, as shown in Figure 2b. Similarly, limiting
can occur near full scale if the REFHI pin is tied to V_CC, as
shown in Figure 2c.
The offset, gain error and linearity of the LTC1654 are
defined and tested in output ranges that avoid limiting.
The low code k_L used in these measurements is defined as
the code which gives a nominal output of 32mV above
ground; see Table 2.
V_REF = V_CC
POSITIVE
FSE
OUTPUT
VOLTAGE
V_REF = V_CC
OUTPUT
VOLTAGE
INPUT CODE
(c)
OUTPUT
VOLTAGE
0
8192
16383
INPUT CODE
(a)
0V
NEGATIVE
OFFSET
INPUT CODE
(b)
1654 F02
Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve: (a) Overall Transfer Function, (b) Effect of Negative
Offset for Codes Near Zero Scale, (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When V_REF = V_CC
Table 2. Low Code k_L
V_REFHI, V
4.096 2.048
1 128 256
1/2 256 512
Note: V_REFLO = O
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