LTC1627_15 Datasheet, PDF (11/16 Pages) Linear Technology – Monolithic Synchronous Step-Down Switching Regulator

LTC1627
APPLICATIO S I FOR ATIO
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to (∆I_LOAD • ESR), where ESR is the effective series
resistance of C_OUT. ∆I_LOAD also begins to charge or dis-
charge C_OUT, which generates a feedback error signal. The
regulator loop then acts to return V_OUT to its steady-state
value. During this recovery time V_OUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The internal compensation provides adequate com-
pensation for most applications. But if additional compen-
sation is required, the I_TH pin can be used for external
compensation as shown in Figure 7.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C_OUT, causing a rapid drop in V_OUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • C_LOAD).
Thus, a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1627. These items are also illustrated graphically in
the layout diagram of Figure 7. Check the following in your
layout:
1. Are the signal and power grounds segregated? The
LTC1627 signal ground consists of the resistive
divider, the optional compensation network (R_C and
C_C1), C_SS and C_C2. The power ground consists of the
(–) plate of C_IN, the (–) plate of C_OUT and Pin 4 of the
LTC1627. The power ground traces should be kept
short, direct and wide. The signal ground and power
ground should converge to a common node in a star-
ground configuration.
2. Does the V_FB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C_OUT and signal ground.
C_C2
OPTIONAL
R_C
C_C1
C_SS
1
I_TH
8
SYNC/FCB
2
RUN/SS
7
V_DR
LTC1627
3
V_FB
6
V_IN
4
GND
5
SW
BOLD LINES INDICATE
HIGH CURRENT PATHS
L1
+
R2
+
V_OUT
C_OUT
R1
–
OPTIONAL
C_V
+
+
D1
C_IN
V_IN
D2
C_B
–
1627 F07
Figure 7. LTC1627 Layout Diagram
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