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LTC1410 Datasheet, PDF (11/16 Pages) Linear Technology – 12-Bit, 1.25Msps Sampling A/D Converter with Shutdown
LTC1410
APPLICATIONS INFORMATION
easily overdriven in applications where an external refer-
ence is required. The reference amplifier provides buffer-
ing between the internal reference and the capacitive DAC.
The reference amplifier compensation pin REFCOMP
(Pin 4), must be bypassed with a capacitor to ground. The
reference amplifier is stable with capacitors of 1µF or
greater. For the best noise performance, a 10µF tantalum
in parallel with 0.1µF ceramic is recommended.
The VREF pin can be driven with an external reference
(Figure 8b), a DAC or other means to provide input span
adjustment. The VREF should be kept in the range of 2.25V
to 2.75V for specified linearity.
5V
VIN
LT1019A-2.5
VOUT
ANALOG
INPUT
1
+AIN
2
–AIN
3
VREF
10µF
4
0.1µF 5
REFCOMP
AGND
LTC1410
1410 F08b
Figure 8b. Using the LT1019-2.5 as an External Reference
Full-Scale and Offset Adjustment
Figure 9 shows the ideal input/output characteristics for
the LTC1410. The code transitions occur midway between
successive integer LSB values (i.e., – FS + 0.5LSB,
– FS + 1.5LSB, – FS + 2.5LSB, . . . FS – 1.5LSB,
FS – 0.5LSB).The output is two’s complement binary
with 1LSB = [(+FS) – (– FS)]/4096 = 5V/4096 = 1.22mV.
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 10
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
applied to the – AIN input. For zero offset error apply
– 0.61mV (i.e., – 0.5LSB) at +AIN and adjust the offset at
the – AIN input until the output code flickers between 0000
0000 0000 and 1111 1111 1111. For full-scale adjust-
ment, an input voltage of 2.49817V (FS – 1.5LSBs) is
applied to AIN and R2 is adjusted until the output code
flickers between 0111 1111 1110 and 0111 1111 1111.
011...111
011...110
000...001
000...000
111...111
111...110
BIPOLAR
ZERO
100...001
100...000
FS = 2.5V
1LSB = 2FS
4096
–1 0V 1
–FS
LSB LSB
FS – LSB
INPUT VOLTAGE, (+AIN) – (–AIN) (V)
1410 F09
Figure 9. LTC1410 Transfer Characteristics
– 5V
R1
50k
ANALOG
R3
INPUT
47k
R4
100Ω
R5 R2
47k 50k
R6
24k
10µF
0.1µF
1 +AIN
2 –AIN
3 VREF
4
REFCOMP
5 AGND
LTC1410
1410 F10
Figure 10. Offset and Full-Scale Adjust Circuit
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1410, a printed circuit board
with ground plane is required. Layout for the printed
circuit board should ensure that digital and analog signal
lines are separated as much as possible. Particular care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.
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