LTC3220_15 Datasheet, PDF (10/20 Pages) Linear Technology – 360mA Universal 18-Channel LED Driver

LTC3220/LTC3220-1
OPERATION
Blinking
Each universal output (ULED1 to ULED18) can be set to
blink with an on time of 0.156 seconds, or 0.625 seconds
and a period of 1.25 seconds, or 2.5 seconds via the I²C
port. The blinking rate is selected via REG19 and ULED
outputs are selected via REG1 to REG18. Blinking and
gradation rates are independent. Please refer to Applica-
tion Note 115 for detailed information and examples on
programming blinking.
Gradation
Universal LED outputs ULED1 to ULED18 can be set to
have the current ramp up and down at 0.24 seconds, 0.48
seconds and 0.96 seconds rates via the I²C port. Each of
these outputs can have either blinking or gradation enabled.
The gradation time is set via REG19 and ULED outputs
are selected via REG1 to REG18. The ramp direction is
also controlled via REG19. Setting the up bit high causes
gradation to ramp up, setting this bit to a low causes
gradation to ramp down. Please refer to Application Note
115 for detailed information and examples on program-
ming gradation.
When gradation is disabled the LED output current remains
at the programmed value.
The charge pump mode is reset to 1x mode after gradation
completes ramping down.
Chip Reset (RST)
The RST pin is used to turn off the chip, including the charge
pump and all ULED outputs, and clear all registers in the
LTC3220/LTC3220-1. When RST is low, the part is in shut-
down and cannot be programmed through the I²C port.
Shutdown Current
Shutdown occurs when all the current source data bits
have been written to zero, when the shutdown bit in REG0
is written with a logic 1, when RST is pulled low, or when
DV_CC is set below the undervoltage lockout voltage.
Although the LTC3220/LTC3220-1 are designed to have
very low shutdown current, they will draw about 3μA
from V_IN when in shutdown. Internal logic ensures that
the LTC3220/LTC3220-1 are in shutdown when DV_CC is
low. Note, however that all of the logic signals that are
referenced to DV_CC (SCL, SDA and RST) will need to be
at DV_CC or below (i.e., ground) to avoid violation of the
absolute maximum specifications on these pins.
EMI Reduction
The flying capacitor pins C1M, C1P, C2M and C2P have
controlled slew rates to reduce conducted and radiated
noise.
Serial Port
The microcontroller compatible I²C serial port provides
all of the command and control inputs for the LTC3220/
LTC3220-1. Data on the SDA input is loaded on the rising
edge of SCL. D7 is loaded first and D0 last. There are
20 data registers, one address register and one sub-ad-
dress register. Once all address bits have been clocked
into the address register, an acknowledge occurs. The
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