LTM9008-14 Datasheet, PDF (1/36 Pages) Linear Technology – 14-Bit, 65Msps/40Msps/25Msps Low Power Octal ADCs

FEATURES
n _{8-Channel Simultaneous Sampling ADC}
n _{73dB SNR}
n _{90dB SFDR}
n _{Low Power: 88mW/59mW/46mW per Channel}
n _{Single 1.8V Supply}
n _{Serial LVDS Outputs: 1 or 2 Bits per Channel}
n _{Selectable Input Ranges: 1VP-P to 2VP-P}
n _{800MHz Full Power Bandwidth S/H}
n _{Shutdown and Nap Modes}
n _{Serial SPI Port for Configuration}
n _{Internal Bypass Capacitance, No External}
Components
n _{140-Pin (11.25mm × 9mm) BGA Package}
APPLICATIONS
n _{Communications}
n _{Cellular Base Stations}
n _{Software Defined Radios}
n _{Portable Medical Imaging}
n _{Multichannel Data Acquisition}
n _{Nondestructive Testing}
LTM9008-14/
LTM9007-14/LTM9006-14
14-Bit, 65Msps/40Msps/
25Msps Low Power Octal ADCs
DESCRIPTION
The LTM^®9008-14/LTM9007-14/LTM9006-14 are 8-chan-
nel, simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
AC performance includes 73dB SNR and 90dB spurious
free dynamic range (SFDR). Low power consumption per
channel reduces heat in high channel count applications.
Integrated bypass capacitance and flowthrough pinout
reduces overall board space requirements.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2LSB_RMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode).
The ENC⁺ and ENC^– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
CHANNEL 1
ANALOG
S/H
INPUT
CHANNEL 2
ANALOG
S/H
INPUT
1.8V
V_DD
14-BIT
ADC CORE
14-BIT
ADC CORE
CHANNEL 8
ANALOG
S/H
INPUT
ENCODE
INPUT
14-BIT
ADC CORE
PLL
GND
1.8V
OV_DD
DATA
SERIALIZER
GND
OUT1A
OUT1B
OUT2A
OUT2B
OUT8A
OUT8B
DATA
CLOCK
OUT
FRAME
90067814 TA01
SERIALIZED
LVDS
OUTPUTS
LTM9008-14, 65Msps,
2-Tone FFT, f_IN = 70MHz and 75MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10
20
30
FREQUENCY (MHz)
90067814 TA01b
90067814f
1