LTC4300-2_15 Datasheet, PDF (1/18 Pages) Linear Technology – Hot Swappable 2-Wire Bus Buffers

Features
n _{Bidirectional Buffer for SDA and SCL Lines}
Increases Fanout
n _{Prevents SDA and SCL Corruption During Live}
Board Insertion and Removal From Backplane
n _{Isolates Input SDA and SCL Lines From Output}
n _{Compatible with I}²_{C, I}²_{C Fast Mode and SMBus}
Standards (Up to 400kHz Operation)
n _{Low ICC Chip Disable: <1µA (LTC4300-1)}
n _{READY Open-Drain Output (LTC4300-1)}
n _{1V Precharge on All SDA and SCL Lines}
n _{Supports Clock Stretching, Arbitration and}
Synchronization
n _{5V to 3.3V Level Translation (LTC4300-2)}
n _{High Impedance SDA, SCL Pins for VCC = 0V}
n _{Small MSOP 8-Lead Package}
Applications
n _{Hot Board Insertion}
n _Servers
n _{Capacitance Buffer/Bus Extender}
n _{Desktop Computer}
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners. *Protected by U.S. Patents, including 6650174.
LTC4300-1/LTC4300-2
Hot Swappable
2-Wire Bus Buffers
Description
The LTC^®4300 series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without cor-
ruption of the data and clock busses. When the connection
is made, the LTC4300-1/LTC4300-2 provide bidirectional
buffering, keeping the backplane and card capacitances
isolated. Rise time accelerator circuitry* allows the use of
weaker DC pull-up currents while still meeting rise time
requirements. During insertion, the SDA and SCL lines are
precharged to 1V to minimize bus disturbances.
The LTC4300‑1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
mode when driven to ground and sets normal operation
when driven to V­_CC. It also includes an open drain READY
output pin, which indicates that the backplane and card
sides are connected together. The LTC4300‑2 replaces
the ENABLE pin with a dedicated supply voltage pin, V_CC2,
for the card side, providing level shifting between 3.3V
and 5V systems. Both the backplane and card may be
powered with supply voltages ranging from 2.7V to 5.5V,
with no constraints on which supply voltage is higher.
The LTC4300‑2 also replaces the READY pin with a digital
CMOS input pin, ACC, which enables and disables the rise
time accelerator currents.
The LTC4300 is available in a small 8‑lead MSOP package.
Typical Application
V_CC
3.3V
R1 R2
24k 24k
8
C1
0.01µF
3
2
SCLIN
C2*
R3 R4
24k 24k
SCLOUT
C4*
SDAIN
6
C3*
7
SDAOUT
C5*
Input–Output Connection t_PLH
OUTPUT SIDE
50pF
0.5V/DIV
INPUT SIDE
150pF
*CAPACITORS NOT REQUIRED
IF BUS IS SUFFICIENTLY LOADED
1
LTC4300-1
5
ENABLE _GND READY
4
430012 TA01a
For more information www.linear.com/LTC4300-1
200ns/DIV
430012 TA01b
430012fb
1