LTC2657_15 Datasheet, PDF (1/24 Pages) Linear Technology – Octal I2C 16-/12-Bit Rail-to-Rail DACs with 10ppm/C Max Reference

FEATURES
n _{Integrated Reference 10ppm/°C Max}
n _{Maximum INL Error: ±4LSB}
n _{Guaranteed Monotonic Over Temperature}
n _{Selectable Internal or External Reference}
n _{2.7V to 5.5V Supply Range (LTC2657-L)}
n _{Integrated Reference Buffers}
n _{Ultralow Crosstalk between DACs(0.8nV•s)}
n _{Power-On-Reset to Zero-Scale/Mid-Scale}
n _{400kHz I}²_{C Interface}
n _{Tiny 20-Lead 4mm × 5mm QFN and 20-Lead}
Thermally enhanced TSSOP packages
APPLICATIONS
n _{Mobile Communications}
n _{Process Control and Industrial Automation}
n _{Instrumentation}
n _{Automatic Test Equipment}
n _Automotive
LTC2657
Octal I²C 16-/12-Bit
Rail-to-Rail DACs with
10ppm/°C Max Reference
DESCRIPTION
The LTC^®2657 is a family of octal I²C 16-/12-Bit Rail-to-
Rail DACs with Integrated 10ppm/°C Max Reference. The
DACs have built-in high performance, rail-to-rail, output
buffers and are guaranteed monotonic. The LTC2657-L has
a full-scale output of 2.5V with the integrated reference and
operates from a single 2.7V to 5.5V supply. The LTC2657-H
has a full-scale output of 4.096V with the integrated reference
and operates from a 4.5V to 5.5V supply. Each DAC can also
operate with an external reference, which sets the full-scale
output to 2 times the external reference voltage.
The parts use a 2-wire I²C compatible serial interface. The
LTC2657 operates in both the standard mode (maximum
clock rate of 100kHz) and the fast mode (maximum clock
rate of 400kHz). The LTC2657 incorporates a power-on reset
circuit that is controlled by the PORSEL pin. If PORSEL is tied
to GND the DACs reset to zero-scale at power-up. If PORSEL
is tied to V_CC, the DACs reset to mid-scale at power-up.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
5396245, 6891433 and patent pending.
BLOCK DIAGRAM
REFCOMP
GND
REFLO
V_OUTA
REF
DAC A
INTERNAL REFERENCE
DAC H
REFIN/OUT
V_CC
V_OUTH
V_OUTB
DAC B
DAC G
V_OUTG
V_OUTC
DAC C
DAC F
V_OUTF
V_OUTD
CA0
CA1
CA2
LDAC
DAC D
32-BIT SHIFT REGISTER
2-WIRE INTERFACE
DAC E
POWER-ON RESET
V_OUTE
PORSEL
SDA
SCL
2657 BD
INL vs Code (LTC2657-16)
4
3
2
1
0
–1
–2
–3
–4
128
16384
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
DAC H
32768
CODE
49152 65535
2657 TA01
2657f
1