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LTC2605 Datasheet, PDF (1/16 Pages) Linear Technology – Octal 16-/14-/12-Bit Rail-to-Rail DACs in 16-Lead SSOP | |||
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LTC2605/LTC2615/LTC2625
Octal 16-/14-/12-Bit
Rail-to-Rail DACs in 16-Lead SSOP
FEATURES
DESCRIPTIO
â Smallest Pin-Compatible Octal DACs:
LTC2605: 16 Bits
LTC2615: 14 Bits
LTC2625: 12 Bits
â Guaranteed Monotonic Over Temperature
â 400kHz I2C Interface
â Wide 2.7V to 5.5V Supply Range
â Low Power Operation: 250µA per DAC at 3V
â Individual Channel Power-Down to 1µA, Max
â Ultralow Crosstalk Between DACs (<10µV)
â High Rail-to-Rail Output Drive (±15mA, Min)
â Double-Buffered Digital Inputs
â 27 Selectable Addresses
â LTC2605/LTC2615/LTC2625: Power-On Reset to
Zero Scale
â LTC2605-1/LTC2615-1/LTC2625-1: Power-On Reset
to Midscale
â Tiny 16-Lead Narrow SSOP Package
U
APPLICATIO S
â Mobile Communications
â Process Control and Industrial Automation
â Instrumentation
â Automatic Test Equipment
The LTC®2605/LTC2615/LTC2625 are octal 16-, 14-
and 12-bit, 2.7V to 5.5V rail-to-rail voltage-output DACs in
16-lead narrow SSOP packages. They have built-in
high performance output buffers and are guaranteed
monotonic.
These parts establish new board-density benchmarks
for 16- and 14-bit DACs and advance performance
standards for output drive, crosstalk and load regulation
in single-supply, voltage-output multiples.
The parts use the 2-wire I2C compatible serial interface.
The LTC2605/LTC2615/LTC2625 operate in both the
standard mode (maximum clock rate of 100kHz) and the
fast mode (maximum clock rate of 400kHz).
The LTC2605/LTC2615/LTC2625 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise
less than 10mV above zero scale; and after power-up, they
stay at zero scale until a valid write and update take place.
The power-on reset circuit resets the LTC2605-1/
LTC2615-1/LTC2625-1 to midscale. The voltage output
stays at midscale until a valid write and update
takes place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
BLOCK DIAGRA
GND 1
VOUT A 2
DAC A
VOUT B 3
DAC B
VOUT C 4
DAC C
VOUT D 5
REF 6
CA2 7
SCL 8
DAC D
32-BIT SHIFT REGISTER
2-WIRE INTERFACE
DAC H
16 VCC
15 VOUT H
DAC G
14 VOUT G
DAC F
13 VOUT F
DAC E
12 VOUT E
11 CA0
10 CA1
9 SDA
2605/15/25 BD
Differential Nonlinearity (LTC2605)
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
0.2
0
â0.2
â0.4
â0.6
â0.8
â1.0
0
16384
32768
CODE
49152 65535
2605 G02
2605f
1
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