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LTC2356-12_15 Datasheet, PDF (1/18 Pages) Linear Technology – Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown
LTC2356-12/LTC2356-14
Serial 12-Bit/14-Bit, 3.5Msps
Sampling ADCs with Shutdown
FEATURES
n 3.5Msps Conversion Rate
n 74.1dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits
n Low Power Dissipation: 18mW
n 3.3V Single Supply Operation
n 2.5V Internal Bandgap Reference can be Overdriven
n 3-Wire SPI-Compatible Serial Interface
n Sleep (13µW) Shutdown Mode
n Nap (4mW) Shutdown Mode
n 80dB Common Mode Rejection
n ±1.25V Bipolar Input Range
n Tiny 10-Lead MSOP Package
APPLICATIONS
n Communications
n Data Acquisition Systems
n Uninterrupted Power Supplies
n Multiphase Motor Control
n Multiplexed Data Acquisition
n RFID
DESCRIPTION
The LTC®2356-12/LTC2356-14 are 12-bit/14-bit, 3.5Msps
serial ADCs with differential inputs. The devices draw
only 5.5mA from a single 3.3V supply and come in a
tiny 10-lead MSOP package. A Sleep shutdown feature
further reduces power consumption to 13µW. The com-
bination of speed, low power and tiny package makes the
LTC2356-12/LTC2356-14 suitable for high speed, portable
applications.
The 80dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs
differentially. The absolute voltage swing for AIN+ and
AIN– extends from ground to the supply voltage.
The serial interface sends out the conversion results during
the 16 clock cycles following a CONV rising edge for com-
patibility with standard serial interfaces. If two additional
clock cycles for acquisition time are allowed after the data
stream in between conversions, the full sampling rate of
3.5Msps can be achieved with a 63MHz clock.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
BLOCK DIAGRAM
10µF 3.3V
AIN+
AIN–
10µF
LTC2356-14
7 VDD
1+
S&H
2–
14-BIT ADC
14
3 VREF
GND
4
2.5V
REFERENCE
5
6
11
EXPOSED PAD
THREE-
STATE
SERIAL
OUTPUT
PORT
8 SDO
TIMING
LOGIC
10 CONV
9 SCK
2356 BD
THD, 2nd and 3rd vs Input Frequency
for Differential Input Signals
–50
–56
–62
–68
THD
2nd
–74
3rd
–80
–86
–92
–98
–104
0.1
1
10
FREQUENCY (MHz)
100
2356 G02
2356fb
1