LTC2285IUP Datasheet, PDF (1/24 Pages) Linear Technology – Dual 14-Bit, 135Msps Low Power 3.3V ADC

FEATURES
n _{Integrated Dual 14-Bit ADCs}
n _{Sample Rate: 135Msps}
n _{Single 3.3V Supply (2.85V to 3.4V)}
n _{Low Power: 954mW}
n _{72.4dB SNR, 88dB SFDR}
n _{110dB Channel Isolation at 100MHz}
n _{Flexible Input: 1VP-P to 2VP-P Range}
n _{640MHz Full Power Bandwidth S/H}
n _{Clock Duty Cycle Stabilizer}
n _{Shutdown and Nap Modes}
n _{Data Ready Output Clock}
n _{Pin Compatible Family}
125Msps: LTC2283 (12-Bit), LTC2285 (14-Bit)
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
n _{64-Pin (9mm × 9mm) QFN Package}
APPLICATIONS
n _{Wireless and Wired Broadband Communication}
n _{Imaging Systems}
n _{Spectral Analysis}
n _{Portable Instrumentation}
LTC2285IUP#3CGPBF
Dual 14-Bit, 135Msps
Low Power 3.3V ADC
DESCRIPTION
The LTC^®2285IUP#3CGPBF is a 14-bit 135Msps, low
power dual 3.3V A/D converter designed for digitiz-
ing high frequency, wide dynamic range signals. The
LTC2285IUP#3CGPBF is perfect for demanding imaging
and communications applications with AC performance
that includes 72.2dB SNR and 82dB SFDR for signals at
the Nyquist frequency.
Typical DC specs include ±1.5LSB INL, ±0.6LSB DNL. The
transition noise is a low 1.3LSB_RMS.
A single 3.3V supply allows low power operation. A
separate output supply allows the outputs to drive 0.5V
to 3.6V logic.
A single-ended CLK input controls converter operation.
An optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
A data ready output clock (CLKOUT) can be used to latch
the output data.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
ANALOG
INPUT A
+
INPUT
S/H
–
14-BIT
PIPELINED
ADC CORE
CLK A
CLK B
CLOCK/DUTY CYCLE
CONTROL
CLOCK/DUTY CYCLE
CONTROL
ANALOG
INPUT B
+
INPUT
S/H
–
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
OV_DD
D13A
•••
D0A
OGND
OF
MUX
CLKOUT
OUTPUT
DRIVERS
OV_DD
D13B
•••
D0B
OGND
2285 TA01
SNR vs Input Frequency,
–1dB, 2V Range
75
74
73
72
71
70
69
68
67
66
65
0
50 100 150 200 250 300 350
INPUT FREQUENCY (MHz) 2285 TA01b
2285iup#3cgpbf
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