LTC2233_15 Datasheet, PDF (1/28 Pages) Linear Technology – 10-Bit,105Msps/ 80Msps ADCs

FEATURES
■ _{Sample Rate: 105Msps/80Msps}
■ _{61dB SNR up to 140MHz Input}
■ _{75dB SFDR up to 200MHz Input}
■ _{775MHz Full Power Bandwidth S/H}
■ _{Single 3.3V Supply}
■ _{Low Power Dissipation: 475mW/366mW}
■ _{Selectable Input Ranges: ±0.5V or ±1V}
■ _{No Missing Codes}
■ _{Optional Clock Duty Cycle Stabilizer}
■ _{Shutdown and Nap Modes}
■ _{Data Ready Output Clock}
■ _{Pin Compatible Family}
135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit)
105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit)
80Msps: LTC2223 (12-Bit), LTC2233 (10-Bit)
■ _{48-Pin 7mm x 7mUm QFN Package}
APPLICATIO S
■ _{Wireless and Wired Broadband Communication}
■ _{Cable Head-End Systems}
■ _{Power Amplifier Linearization}
■ _{Communications Test Equipment}
TYPICAL APPLICATIO
REFH
REFL
FLEXIBLE
REFERENCE
3.3V
V_DD
ANALOG
INPUT
+
INPUT
S/H
–
10-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
CLOCK/DUTY
CYCLE
CONTROL
ENCODE INPUT
LTC2232/LTC2233
10-Bit,105Msps/
80Msps ADCs
DESCRIPTIO
The LTC^®2232 and LTC2233 are 105Msps/80Msps, sam-
pling 10-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. The LTC2232/
LTC2233 are perfect for demanding communications
applications with AC performance that includes 61dB SNR
and 75dB spurious free dynamic range for signals
up to 200MHz. Ultralow jitter of 0.15ps_RMS allows
undersampling of IF frequencies with excellent noise
performance.
DC specs include ±0.15LSB INL (typ), ±0.1LSB DNL (typ)
and ±0.8LSB INL, ±0.6LSB DNL over temperature. The
transition noise is a low 0.12LSB_RMS.
A separate output power supply allows the outputs to drive
0.5V to 3.6V logic.
The ENC⁺ and ENC^– inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL, or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
OUTPUT
DRIVERS
0.5V
TO 3.6V
OV_DD
D9
•
•
•
D0
OGND
22323 TA01
SFDR vs Input Frequency
90
85
4th OR HIGHER
80
75
70
2nd OR 3rd
65
60
55
50
0
100 200 300 400 500 600
INPUT FREQUENCY (MHz) 22323 TA01b
22323fa
1