LTC2216 Datasheet, PDF (1/36 Pages) Linear Technology – 16-Bit, 80Msps/65Msps Low Noise ADC

FEATURES
n _{Sample Rate: 80Msps/65Msps}
n _{81.5dBFS Noise Floor}
n _{100dB SFDR}
n _{SFDR >95dB at 70MHz}
n _{85fsRMS Jitter}
n _{2.75VP-P Input Range}
n _{400MHz Full Power Bandwidth S/H}
n _{Optional Internal Dither}
n _{Optional Data Output Randomizer}
n _{LVDS or CMOS Outputs}
n _{Single 3.3V Supply}
n _{Power Dissipation: 970mW/700mW}
n _{Clock Duty Cycle Stabilizer}
n _{Pin-Compatible with LTC2208, LTC2217}
n _{64-Pin (9mm × 9mm) QFN Package}
APPLICATIONS
n _{Telecommunications}
n _Receivers
n _{Cellular Base Stations}
n _{Spectrum Analysis}
n _{Imaging Systems}
n _ATE
LTC2216/LTC2215
16-Bit, 80Msps/65Msps
Low Noise ADC
DESCRIPTION
The LTC^®2216/LTC2215 are 80Msps/65Msps sampling 16-
bit A/D converters designed for digitizing high frequency,
wide dynamic range signals with input frequencies up to
400MHz. The input range of the ADC is fixed at 2.75V_P-P.
The LTC2216/LTC2215 are perfect for demanding com-
munications applications, with AC performance that
includes 81.5dBFS noise floor and 100dB spurious free
dynamic range (SFDR). Ultra low jitter of 85fs_RMS allows
undersampling of high input frequencies while maintaining
excellent noise performance. Maximum DC specs include
±3.5LSB INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC⁺ and ENC^– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
3.3V
SENSE
V_CM
2.2μF
1.575V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV_DD
AIN⁺
ANALOG
INPUT
AIN^–
+
S/H
AMP
–
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CLOCK/DUTY
CYCLE
CONTROL
ENC ⁺ ENC ^–
OGND
V_DD
GND
SHDN DITH MODE LVDS RAND
ADC CONTROL INPUTS
0.5V TO 3.6V
1μF
OF
CLKOUT
D15
•
•
•
D0
CMOS
OR
LVDS
1μF
1μF
3.3V
1μF
22165 TA01
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
LTC2216: 64k Point FFT,
f_IN = 4.9MHz, –1dBFS
10
20
30
FREQUENCY (MHz)
40
22165 TA01b
22165f
1