LTC2206 Datasheet, PDF (1/32 Pages) Linear Technology – 16-Bit, 105Msps/80Msps ADCs

FEATURES
■ _{Sample Rate: 105Msps/80Msps}
■ _{78.2dBFS Noise Floor}
■ _{100dB SFDR}
■ _{SFDR >82dB at 250MHz (1.5VP-P Input Range)}
■ _{PGA Front End (2.25VP-P or 1.5VP-P Input Range)}
■ _{700MHz Full Power Bandwidth S/H}
■ _{Optional Internal Dither}
■ _{Optional Data Output Randomizer}
■ _{Single 3.3V Supply}
■ _{Power Dissipation: 900mW/725mW}
■ _{Optional Clock Duty Cycle Stabilizer}
■ _{Out-of-Range Indicator}
■ _{Pin Compatible Family}
105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)
80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)
65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)
40Msps: LTC2204 (16-Bit)
25Msps: LTC2203 (16-Bit) Single-Ended Clock
10Msps: LTC2202 (16-Bit) Single-Ended Clock
■ _{48-Pin 7mm × 7mm QFN Package}
U
APPLICATIO S
■ _{Telecommunications}
■ _Receivers
■ _{Cellular Base Stations}
■ _{Spectrum Analysis}
■ _{Imaging Systems}
■ _ATE
LTC2207/LTC2206
16-Bit, 105Msps/80Msps
ADCs
DESCRIPTIO
The LTC^®2207/LTC2206 are 105Msps/80Msps, sampling
16-bit A/D converters designed for digitizing high fre-
quency, wide dynamic range signals up to input frequencies
of 700MHz. The input range of the ADC can be optimized
with the PGA front end.
The LTC2207/LTC2206 are perfect for demanding commu-
nications applications, with AC performance that includes
78.2dB Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultralow jitter of 80fs_RMS allows undersampling of
high input frequencies with excellent noise performance.
Maximum DC specs include ±4LSB INL, ±1LSB DNL (no
missing codes) over temperature.
A separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
The ENC⁺ and ENC^– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents Pending.
TYPICAL APPLICATIO
3.3V
SENSE
V_CM
2.2µF
1.25V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV_DD
AIN⁺
ANALOG
INPUT
AIN^–
+
S/H
AMP
–
CLOCK/DUTY
CYCLE
CONTROL
ENC⁺ ENC^–
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
OGND
V_DD
GND
PGA SHDN DITH MODE OE
ADC CONTROL INPUTS
RAND
0.5V TO 3.6V
0.1µF
OF
CLKOUT⁺
CLKOUT^–
D15
•
•
•
D0
0.1µF
0.1µF
3.3V
0.1µF
22054 TA01
LTC2207: 64K Point FFT,
f_IN = 14.8MHz, –1dBFS,
PGA = 0, 105Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10
20
30
40
50
FREQUENCY (MHz)
22076 G05
22076fa
1