LTC1458_1 Datasheet, PDF (1/12 Pages) Linear Technology – Quad 12-Bit Rail-to-RailvMicropower DACs

FEATURES
s _{Quad 12-Bit DAC}
s _{Buffered True Rail-to-Rail Voltage Output}
s _{Maximum DNL Error: 0.5LSB}
s _{5V Operation, ICC: 1.1mA Typ (LTC1458)}
s _{3V Operation, ICC: 800µA Typ (LTC1458L)}
s _{Internal or External Reference Operation}
s _{Settling Time: 14µs to ±0.5LSB}
s _{Schmitt Trigger On Clock Input Allows Direct}
Optocoupler Interface
s _{Power-On Reset and CLR Pin}
s _{SSOP-28 Package}
s _{3-Wire Cascadable Serial Interface with 250kHz}
Update Rate
s _{Low Cost}
U
APPLICATIO S
s _{Digital Calibration}
s _{Industrial Process Control}
s _{Automatic Test Equipment}
s _{Low Power Systems}
LTC1458/LTC1458L
Quad 12-Bit Rail-to-Rail
Micropower DACs
DESCRIPTIO
The LTC^®1458/LTC1458L are complete single supply,
quad rail-to-rail voltage output, 12-bit digital-to-analog
converters (DACs) in SO-28 and SSOP-28 packages. They
include an output buffer amplifier with variable gain (×1 or
× 2) and an easy-to-use 3-wire cascadable serial interface.
The LTC1458 has an onboard reference of 2.048V and a
full-scale output of 4.095V in a × 2 gain configuration. It
operates from a single 4.5V to 5.5V supply dissipating
only 5.5mW (I_CC = 1.1mA typ).
The LTC1458L has an onboard 1.22V reference and a full-
scale output of 2.5V in a ×2 gain configuration. It operates
from a single supply of 2.7V to 5.5V dissipating 2.4mW.
Excellent DNL, low supply current and a wide range of
built-in functions allow these parts to be used in a host of
applications when flexibility, power and single supply
operation are important.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPL_DaI_iC_syA_-ChT_aI_inO_{ed Control Outputs}
Functional Block Diagram: Quad 12-Bit Rail-to-Rail DAC
2.048V (LTC1458)
1.22V (LTC1458L)
FROM µP
5V (LTC1458)
3V TO 5V (LTC1458L)
REFHI C
REFOUT
CS/LD CLK DIN
V_CC
REFHI B
V_{OUT C}
X1/X2 C
REFLO C
REFHI D
V_{OUT D}
X1/X2 D
REFLO D
DAC C
DAC D
48-BIT
SHIFT REGISTER
AND
DAC REGISTER
DAC B
DAC A
CLR
D_OUT
V_{OUT B}
X1/X2 B
REFLO B
REFHI A
V_{OUT A}
X1/X2 A
REFLO A
1458 BD01
Differential Nonlinearity
vs Input Code
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0 512 1024 1536 2048 2560 3072 3584 4095
CODE
1458 G09
1