LTC1407A-1_15 Datasheet, PDF (1/26 Pages) Linear Technology – Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown

FEATURES
n _{3Msps Sampling ADC with Two Simultaneous}
Differential Inputs
n _{1.5Msps Throughput per Channel}
n _{Low Power Dissipation: 14mW (Typ)}
n _{3V Single Supply Operation}
n _{±1.25V Differential Input Range}
n _{Pin Compatible 0V to 2.5V Input Range Version}
(LTC1407/LTC1407A)
n _{2.5V Internal Bandgap Reference with External}
Overdrive
n _{3-Wire Serial Interface}
n _{Sleep (10μW) Shutdown Mode}
n _{Nap (3mW) Shutdown Mode}
n _{80dB Common Mode Rejection at 100kHz}
n _{Tiny 10-Lead MS Package}
APPLICATIONS
n _{Telecommunications}
n _{Data Acquisition Systems}
n _{Uninterrupted Power Supplies}
n _{Multiphase Motor Control}
n _{I & Q Demodulation}
n _{Industrial Radio}
LTC1407-1/LTC1407A-1
Serial 12-Bit/14-Bit, 3Msps
Simultaneous Sampling
ADCs with Shutdown
DESCRIPTION
The LTC^®1407-1/LTC1407A-1 are 12-bit/14-bit, 3Msps
ADCs with two 1.5Msps simultaneously sampled differ-
ential inputs. The devices draw only 4.7mA from a single
3V supply and come in a tiny 10-lead MS package. A sleep
shutdown feature lowers power consumption to 10μW.
The combination of speed, low power and tiny package
makes the LTC1407-1/LTC1407A-1 suitable for high speed,
portable applications.
The LTC1407-1/LTC1407A-1 contain two separate differ-
ential inputs that are sampled simultaneously on the rising
edge of the CONV signal. These two sampled inputs are
then converted at a rate of 1.5Msps per channel.
The 80dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs differ-
entially. The absolute voltage swing for CH0⁺, CH0^–, CH1⁺
and CH1^– extends from ground to the supply voltage.
The serial interface sends out the two conversion results in 32
clocks for compatibility with standard serial interfaces.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6084440, 6522187.
BLOCK DIAGRAM
10μF 3V
CH0⁺
CH0^–
CH1⁺
CH1^–
10μF
1+
S&H
2–
4+
S&H
5–
3 ^VREF
GND
6
11 EXPOSED PAD
7
V_DD
MUX
3Msps
14-BIT ADC
2.5V
REFERENCE
LTC1407A-1
THREE-
STATE
SERIAL
OUTPUT
PORT
8 SDO
TIMING
LOGIC
10 CONV
9 SCK
1407A1 BD
THD, 2nd and 3rd vs Input Frequency
for Differential Input Signals
–44
–50
–56
–62
–68
–74
–80
–86
–92
–98
–104
0.1
THD _3RD
1
FREQUENCY (MHz)
2ND
10 20
14071 TA01b
14071fb
1