LTC1407-1 Datasheet, PDF (1/24 Pages) Linear Technology – Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown

FEATURES
s _{3Msps Sampling ADC with Two Simultaneous}
Differential Inputs
s _{1.5Msps Throughput per Channel}
s _{Low Power Dissipation: 14mW (Typ)}
s _{3V Single Supply Operation}
s _{±1.25V Differential Input Range}
s _{Pin Compatible 0V to 2.5V Input Range Version}
(LTC1407/LTC1407A)
s _{2.5V Internal Bandgap Reference with External}
Overdrive
s _{3-Wire Serial Interface}
s _{Sleep (10µW) Shutdown Mode}
s _{Nap (3mW) Shutdown Mode}
s _{80dB Common Mode Rejection at 100kHz}
s _{Tiny 10-Lead MS Package}
U
APPLICATIO S
s _{Telecommunications}
s _{Data Acquisition Systems}
s _{Uninterrupted Power Supplies}
s _{Multiphase Motor Control}
s _{I & Q Demodulation}
s _{Industrial Radio}
LTC1407-1/LTC1407A-1
Serial 12-Bit/14-Bit, 3Msps
Simultaneous Sampling
ADCs with Shutdown
DESCRIPTIO
The LTC^®1407-1/LTC1407A-1 are 12-bit/14-bit, 3Msps
ADCs with two 1.5Msps simultaneously sampled differen-
tial inputs. The devices draw only 4.7mA from a single 3V
supply and come in a tiny 10-lead MS package. A Sleep
shutdown feature lowers power consumption to 10µW.
The combination of speed, low power and tiny package
makes the LTC1407-1/LTC1407A-1 suitable for high speed,
portable applications.
The LTC1407-1/LTC1407A-1 contain two separate differ-
ential inputs that are sampled simultaneously on the rising
edge of the CONV signal. These two sampled inputs are
then converted at a rate of 1.5Msps per channel.
The 80dB common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs differ-
entially. The absolute voltage swing for CH0⁺, CH0^–, CH1⁺
and CH1^– extends from ground to the supply voltage.
The serial interface sends out the two conversion results in
32 clocks for compatibility with standard serial interfaces.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U.S. patent numbers 6084440, 6522187
BLOCK DIAGRA
10µF 3V
CH0⁺
CH0^–
CH1⁺
CH1^–
10µF
1+
S&H
2–
4+
S&H
5–
V_REF
3
GND
6
11 EXPOSED PAD
7
V_DD
MUX
3Msps
14-BIT ADC
2.5V
REFERENCE
LTC1407A-1
THREE-
STATE
SERIAL
OUTPUT
PORT
8 SDO
TIMING
LOGIC
10 CONV
9 SCK
1407A1 BD
THD, 2nd and 3rd vs Input
Frequency for Differential
Input Signals
–44
–50
–56
–62
–68
–74
THD 3rd
–80
–86
–92
2nd
–98
–104
0.1
1
FREQUENCY (MHz)
10 20
14071 G22
14071f
1