LTC1264-7_15 Datasheet, PDF (1/16 Pages) Linear Technology – Linear Phase, Group Delay Equalized, 8th Order Lowpass Filter

LTC1264-7
Linear Phase, Group Delay
Equalized, 8th Order
Lowpass Filter
FEATURES
■ Steeper Roll-Off Than Bessel Filters
■ High Speed: f_C ≤ 200kHz
■ Phase Equalized Filter in a 14-Pin Package
■ Phase and Group Delay Response Fully Tested
■ Transient Response Exhibits 5% Overshoot and
No Ringing
■ 65dB THD or Better Throughout a 100kHz Passband
■ No External Components Needed
■ Available in Plastic 14-Pin DIP and 16-Pin SO
Wide Packages
U
APPLICATIO S
■ Data Communication Filters
■ Time Delay Networks
■ Phase Matched Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
DESCRIPTIO
The LTC1264-7 is a clock-tunable monolithic 8th order
lowpass filter with linear passband phase and flat group
delay. The amplitude response approximates a maximally
flat passband and exhibits steeper roll-off than an equiva-
lent 8th order Bessel filter. For instance, at twice the cutoff
frequency, the filter attains 28dB attenuation (vs 12dB for
Bessel), while at three times the cutoff frequency, the filter
attains 55dB attenuation (vs 30dB for Bessel).
The cutoff frequency of the LTC1264-7 is tuned via an
external TTL or CMOS clock. The clock-to-cutoff
frequency ratio of the LTC1264-7 can be set to 25:1 (pin
10 to V⁺) or 50:1 (pin 10 to V ^–). When the filter operates
at clock-to-cutoff frequency ratio of 25:1, the input is
double-sampled to lower the risk of aliasing.
The LTC1264-7 is optimized for speed. Depending on the
operating conditions, cutoff frequencies between 200kHz
and 250kHz can be obtained. (Please refer to the Passband
vs Clock Frequency graphs.)
The LTC1264-7 is pin-compatible with the LTC1064-X
series.
TYPICAL APPLICATIO
200kHz Linear Phase Lowpass Filter
1
14
V_IN
2
3
13
12
–8V
8V
4 _LTC1264-7 11
f_CLK = 5MHz
5
10
8V
6
9
V_OUT
7
8
1264-7 TA01
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A
0.1µF CAPACITOR CLOSE TO THE PACKAGE AND ANY PRINTED
CIRCUIT BOARD ASSEMBLY SHOULD MAINTAIN A DISTANCE
OF AT LEAST 0.2 INCHES BETWEEN ANY OUTPUT OR INPUT
PIN AND THE f_CLK LINE.
4-Level PAM Eye Diagram
f_CLK = 5MHz
f_C = 200kHz
500ns/DIV
1264-7 TA02
12647fa
1