LT685_1 Datasheet, PDF (1/8 Pages) Linear Technology – High Speed Comparator

FEATURES
■ _{Ultrafast (5.5ns typ)}
■ _{Complementary ECL Output}
■ _{50Ω Line Driving Capability}
■ _{Low Offset Voltage}
■ _{Output Latch Capability}
■ _{External Hysteresis Control}
■ _{Pin Compatible with Am685}
U
APPLICATIO S
■ _{High Speed A-to-D Converters}
■ _{High Speed Sampling Circuits}
■ _Oscillators
TYPICAL APPLICATIO
Comparator with Hysteresis
6V
GND1
V⁺
GND2
V_IN
+
Q
LT685
Q
–
V ^{– HYSTERESIS}
R
LATCH
ENABLE
R_L R_L
–5.2V
V_T
LT685 • TA01
LT685
High Speed Comparator
DESCRIPTIO
The LT^®685 is an ultrafast comparator with differential
inputs and complementary outputs fully compatible with
ECL logic levels. The output current capability is adequate
for driving transmission lines terminated in 50Ω. The low
input offset and high resolution make this comparator
ideally suited for analog-to-digital signal processing
applications.
A latch function is provided to allow the comparator to be
used in a sample-hold mode. When the latch enable input
is ECL high, the comparator functions normally. When the
latch enable is driven low, the comparator outputs are
locked in their existing logical states. If the latch function
is not used, the latch enable must be connected to ground
or ECL high.
The device is pin-compatible with the Am685. Hysteresis
has been added to improve switching time with slow input
signals as well as to minimize oscillation. A single resistor
between the hysteresis pin and V^– adds input hysteresis
voltage as more current is drawn. If hysteresis is not
required, the pin can be left unconnected.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hysteresis
100
HYSTERESIS IS ZERO
IF PIN LEFT OPEN
10
1
100 200
500 1k 2k
RESISTANCE (Ω)
5k 10k
LT685 • TA02
685fa
1