LT1715 Datasheet, PDF (1/16 Pages) Linear Technology – 4ns, 150MHz Dual Comparator with Independent Input/Output Supplies

LT1715
4ns, 150MHz
Dual Comparator with
Independent Input/Output Supplies
FEATURES
s _{UltraFast: 4ns at 20mV Overdrive}
s _{150MHz Toggle Frequency}
s _{Separate Input and Output Power Supplies}
s _{Low Power: 4.6mA per Comparator at 3V}
s _{Pinout Optimized for High Speed Use}
s _{Output Optimized for 3V and 5V Supplies}
s _{TTL/CMOS Compatible Rail-to-Rail Output}
s _{Input Voltage Range Extends 100mV}
Below Negative Rail
s _{Internal Hysteresis with Specified Limits}
U
APPLICATIO S
s _{High Speed Differential Line Receivers}
s _{Level Translators}
s _{Window Comparators}
s _{Crystal Oscillator Circuits}
s _{Threshold Detectors/Discriminators}
s _{High Speed Sampling Circuits}
s _{Delay Lines}
DESCRIPTIO
The LT^®1715 is an UltraFast^TM dual comparator optimized
for low voltage operation. Separate supplies allow inde-
pendent analog input ranges and output logic levels with
no loss of performance. The input voltage range extends
from 100mV below V_EE to 1.2V below V_CC. Internal hyster-
esis makes the LT1715 easy to use even with slow moving
input signals. The rail-to-rail outputs directly interface to
TTL and CMOS. The symmetric output drive results in
similar rise and fall times that can be harnessed for analog
applications or for easy translation to other single supply
logic levels.
The LT1715 is available in the 10-pin MSOP package. The
pinout of the LT1715 minimizes parasitic effects by plac-
ing the most sensitive inputs away from the outputs,
shielded by the power rails.
For a dual/quad single supply comparator with similar
propagation delay, see the LT1720/LT1721. For a single
comparator with similar propagation delay, see the LT1719.
, LTC and LT are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
100MHz Dual Differential Line Receiver
5V
3V
+
IN A
–
OUT A
+
IN B
–
–5V
OUT B
1715 TA01
Line Receiver Response to 100MHz Clock,
50MHz Data Both with 25mV_P-P Inputs
3V
CLOCK OUT
1V/DIV
0V
3V
DATA OUT
0V
FET PROBES
5ns/DIV
1V/DIV
1715 TA02
1