LT1074I Datasheet, PDF (8/16 Pages) Linear Technology – Step-Down Switching Regulator

LT1074/LT1076
PI DESCRIPTIO S
V_IN PIN
The V_IN pin is both the supply voltage for internal control
circuitry and one end of the high current switch. It is
important, especially at low input voltages, that this pin be
bypassed with a low ESR, and low inductance capacitor to
prevent transient steps or spikes from causing erratic
operation. At full switch current of 5A, the switching
transients at the regulator input can get very large as
shown in Figure 1. Place the input capacitor very close to
the regulator and connect it with wide traces to avoid extra
inductance. Use radial lead capacitors.
( )dl (LP)
dt
STEP =
(^ISW) ( ^ESR)
RAMP =
(^ISW) ( ^TON )
C
LT1074•PD01
Figure 1. Input Capacitor Ripple
( )( ) ^∆VGND ^VOUT
∆V_OUT =
2.21
To ensure good load regulation, the ground pin must be
connected directly to the proper output node, so that no
high currents flow in this path. The output divider resistor
should also be connected to this low current connection
line as shown in Figure 2.
LT1074
GND ^FB
R2
HIGH CURRENT
RETURN PATH
NEGATIVE OUTPUT NODE
WHERE LOAD REGULATION
WILL BE MEASURED
LT1074•PD02
Figure 2. Proper Ground Pin Connection
L_P = Total inductance in input bypass connections
and capacitor.
“Spike” height (dI/dt • L_P) is approximately 2V per
inch of lead length for LT1074 and 0.8V per inch for
LT1076.
“Step” for ESR = 0.05Ω and I_SW = 5A is 0.25V.
“Ramp” for C = 200µF, T_ON = 5µs, and I_SW = 5A,
is 0.12V.
Input current on the V_IN Pin in shutdown mode is the sum
of actual supply current (≈140µA, with a maximum of
300µA), and switch leakage current. Consult factory for
special testing if shutdown mode input current is critical.
GROUND PIN
It might seem unusual to describe a ground pin, but in the
case of regulators, the ground pin must be connected
properly to ensure good load regulation. The internal
reference voltage is referenced to the ground pin; so any
error in ground pin voltage will be multiplied at the output;
FEEDBACK PIN
The feedback pin is the inverting input of an error amplifier
which controls the regulator output by adjusting duty
cycle. The noninverting input is internally connected to a
trimmed 2.21V reference. Input bias current is typically
0.5µA when the error amplifier is balanced (I_OUT = 0). The
error amplifier has asymmetrical G_M for large input sig-
nals to reduce startup overshoot. This makes the amplifier
more sensitive to large ripple voltages at the feedback pin.
100mVp-p ripple at the feedback pin will create a 14mV
offset in the amplifier, equivalent to a 0.7% output voltage
shift. To avoid output errors, output ripple (P-P) should be
less than 4% of DC output voltage at the point where the
output divider is connected.
See the “Error Amplifier” section for more details.
Frequency Shifting at the Feedback Pin
The error amplifier feedback pin (FB) is used to downshift
the oscillator frequency when the regulator output voltage
is low. This is done to guarantee that output short-circuit
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