LTC2634 Datasheet, PDF (21/28 Pages) Linear Technology – Quad 12-/10-/8-Bit Rail-to-Rail DACs with 10ppm/°C Reference

LTC2634
OPERATION
Power-Down Mode
For power-constrained applications, power-down mode can
be used to reduce the supply current whenever less than
four DAC outputs are needed. When in power down, the
buffer amplifiers, bias circuits, and integrated reference
circuits are disabled, and draw essentially zero current.
The DAC outputs are put into a high impedance state, and
the output pins are passively pulled to ground through
individual 200k resistors. Input- and DAC-register contents
are not disturbed during power down.
Any DAC channel or combination of channels can be put
into power-down mode by using command 0100b in
combination with the appropriate DAC address, (n). The
supply current is reduced approximately 20% for each DAC
powered down. The integrated reference is automatically
powered down when external reference is selected using
command 0111b. In addition, all the DAC channels and
the integrated reference together can be put into power-
down mode using power-down chip command 0101b.
When the integrated reference and all DAC channels are
in power-down mode, the REF pin becomes high imped-
ance (typically > 1GΩ). For all power-down commands
the 16-bit data word is ignored.
Normal operation resumes after executing any command
that includes a DAC update, (as shown in Table 1) or pull-
ing the asynchronous LDAC pin low. The selected DAC
is powered up as its voltage output is updated. When
a DAC which is in a powered-down state is powered up
and updated, normal settling is delayed. If less than four
DACs are in a powered-down state prior to the update
command, the power-up delay time is 10μs. However, if
all four DACs and the integrated reference are powered
down, then the main bias generation circuit block has been
automatically shut down in addition to the DAC amplifiers
and reference buffers. In this case, the power-up delay time
is 12μs. The power-up of the integrated reference depends
on the command that powered it down. If the reference is
powered down using the select external reference com-
mand (0111b), then it can only be powered back up using
select internal reference command (0110b). However, if
the reference was powered down using power-down chip
command (0101b), then in addition to select internal
reference command (0110b), any command (in software
or using the LDAC pin) that powers up the DACs will also
power up the integrated reference.
Voltage Output
The LTC2634’s integrated rail-to-rail amplifier has guaran-
teed load regulation when sourcing or sinking up to 10mA
at 5V, and 5mA at 3V.
Load regulation is a measure of the amplifier’s ability to
maintain the rated voltage accuracy over a wide range of
load current. The measured change in output voltage per
change in forced load current is expressed in LSB/mA.
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in
units from LSB/mA to ohms. The amplifier’s DC output
impedance is 0.1Ω when driving a load well away from
the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by
the 50Ω typical channel resistance of the output devices
(e.g., when sinking 1mA, the minimum output voltage is
50Ω • 1mA, or 50mV). See the graph “Headroom at Rails
vs Output Current” in the Typical Performance Character-
istics section.
The amplifier is stable driving capacitive loads of up to
500pF.
2634f
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