LND-SP64HV Datasheet, PDF (1/3 Pages) Linear Dimensions Semiconductor – 32MHZ, 64 CHANNEL SERIAL TO PARALLEL CONVERTER WITH PUSH-PULL OUTPUTS

DATA SHEET
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LND-SP64HV
32MHZ, 64 CHANNEL SERIAL TO PARALLEL CONVERTER WITH PUSH-PULL OUTPUTS
Features
 HVCMOS^® Technology
 5.0V CMOS Logic
 Output voltage up to +90V
 Low power level shifting
 32MHz equivalent data rate
 Latched data outputs
 Forward and reverse shifting options (DIR pin)
 Diode to V_PP allows efficient power recovery
 Outputs may be hot switched
 Hi-Rel processing available
General Description
The LND-SP64HV is a low voltage serial to high voltage
parallel converter with push-pull outputs. The device has
been designed for use as a driver for EL displays. It can
also be used in any application requiring multiple output
high voltage current sourcing and sinking capability such
as driving plasma panels, vacuum fluorescent displays,
or large matrix LCD displays.
The device has 4 parallel 16-bit registers, permitting data
rates 4x the speed of one (they are clocked together).
There are also 64 latches and control logic to perform the
polarity select and blanking of the outputs. HV_OUT1 is
connected to the first stage of the first shift register
through the polarity and blanking logic. Data is shifted
through the shift registers on the logic low to high
transition of the clock. The DIR pin causes CCW shifting
when connected to GND, and CW shifting when
connected to V_DD. A data output buffer is provided for
cascading devices. This output reflects the current status
of the last bit of the shift register (HV_OUT64). Operation of
the shift register is not affected by the (latch enable),
(blanking), or the
(polarity) inputs. Transfer of
data from the shift registers to the latches occurs when
the input is high. The data in the latches is stored
when the is low.
Functional Block Diagram
 Linear Dimensions, Inc.  445 East Ohio Street, Chicago IL 60611 USA  tel [phone]  fax [phone]  www.lineardimensions.com 