LTC1290DCJ Datasheet, PDF (7/32 Pages) Linear Integrated Systems – Single Chip 12-Bit Data Acquisition System

LTC1290
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Filter Resistor vs
Cycle Time
10k
1k
Sample-and-Hold Acquisition
Time vs Source Resistance
100
V_REF = 5V
V_CC = 5V
T_A = 25°C
0V TO 5V INPUT STEP
100
+ ^RSOURCE+
V_IN
10
R_FILTER
–
V_IN
+
10
C_FILTER ≥ 1µF
–
1.0
1
10
100
1000
10000
100
CYCLE TIME, t_CYC (µs) 1290 • TPC10
** MAXIMUM R_FILTER REPRESENTS THE FILTER RESISTOR
VALUE AT WHICH A 0.1LSB CHANGE IN FULL-SCALE
ERROR FROM ITS VALUE AT R_FILTER = 0 IS FIRST DETECTED.
1k
R_SOURCE+ (Ω)
10k
LTC1290 • TPC11
Supply Current (Power Shutdown)
vs ACLK
200
V_CC = 5V
180 _{CMOS LEVELS}
160
140
120
100
80
60
40
20
0
1.00
2.00
3.00
4.00
ACLK FREQUENCY (MHz)
1290 • TPC13
Input Channel Leakage Current
vs Temperature
1000
900
GUARANTEED
800
700
600
500
400
300
200
ON CHANNEL
100
OFF CHANNEL
0
–50 –30 –10 10 30 50 70 90 110 130
AMBIENT TEMPERATURE, T_A (°C)
1290 • TPC14
Supply Current (Power Shutdown)
vs Temperature
10
ACLK OFF DURING
9 _{POWER SHUTDOWN}
8
7
6
5
4
3
2
1
0
–50 –30 –10 10 30 50 70 90 110 130
AMBIENT TEMPERATURE, T_A (°C)
1290 • TPC12
Noise Error vs Reference Voltage
2.25
2.00 ^{LTC1290 NOISE 200µVP-P}
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
0
1
2
3
4
5
REFERENCE VOLTAGE, V_REF (V)
1290 • TPC15
PI FU CTIO S
CH0 to CH7 (Pin 1 to Pin 8): Analog Inputs. The analog
inputs must be free of noise with respect to AGND.
COM (Pin 9): Common. The common pin defines the zero
reference point for all single-ended inputs. It must be free
of noise and is usually tied to the analog ground plane.
DGND (Pin 10): Digital Ground. This is the ground for the
internal logic. Tie to the ground plane.
AGND (Pin 11): Analog Ground. AGND should be tied
directly to the analog ground plane.
V ^– (Pin 12): Negative Supply. Tie V ^– to most negative
potential in the circuit. (Ground in single supply applica-
tions.)
REF ^–, REF ⁺ (Pins 13, 14): Reference Inputs. The refer-
ence inputs must be kept free of noise with respect to
AGND.
CS (Pin 15): Chip Select Input. A logic low on this input
enables data transfer.
D_OUT (Pin 16): Digital Data Output. The A/D conversion
result is shifted out of this output.
1290fe
7