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LT1112_1 Datasheet, PDF (6/16 Pages) Linear Integrated Systems – Dual/Quad Low Power Precision, Picoamp Input Op Amps
LT1112/LT1114
ELECTRICAL CHARACTERISTICS
Note 5: Offset voltage, supply current and power supply rejection ratio are
measured at the minimum supply voltage.
Note 6: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1114; between the two amplifiers on the
LT1112.
Note 7: This parameter is the difference between two noninverting input
bias currents.
Note 8: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and PSRR
are measured in µV/V on the individual amplifiers. (2) The difference is
calculated between the matching sides in µV/V. (3) The result is converted
to dB.
Note 9: This parameter is not 100% tested.
Note 10: These parameters are not tested. More than 99% of the op amps
tested during product characterization have passed the maximum limits.
100% passed at 1kHz.
Note 11: The LT1112AC/LT1112C/LT1112S8/LT1112I and LT1114AC/
LT1114C/LT1114S/LT1114I are guaranteed functional over the
temperature range of –40°C to 85°C.
Note 12: The LT1112AC/LT1112C/LT1112S8/LT1114AC/LT1114C/
LT1114S are guaranteed to meet specified performance from 0°C to 70°C
and are designed, characterized and expected to meet specified
performance from –40°C to 85°C, but are not tested or QA sampled at
these temperatures. The LT1112I/LT1114I are guaranteed to meet
specified performance from –40°C to 85°C.
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias and Offset Current,
Noninverting Bias Current Match
vs Temperature
200
∆IB+
100
IOS
0
IB (UNDERCANCELLED)
–100
IB (OVERCANCELLED)
VS = ±15V
–200
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
100 125
LT1112/14 • TPC01
Drift with Temperature
LT1112N8/J8, LT1114J
20
850 OP AMPS TESTED
100 LT1112J8
165 LT1112N8
15 80 LT1114J
VS = ±15V
10
5
Input Bias Current Over
Common Mode Range
150
VS = ±15V
100
TA = 25°C
RINCM = 800GΩ
50 DEVICE WITH POSITIVE INPUT CURRENT
0 DEVICE WITH NEGATIVE INPUT CURRENT
–50
–100
–
IB +
VCM
–150
–15 –10 –5 0
5
10 15
COMMON MODE INPUT VOLTAGE (V)
LT1112/14 • TPC02
Drift with Temperature
LT1112S8, LT1114N/S
25
960 OP AMPS TESTED
240 LT1112S8
20 80 LT1114N
40 LT1114S
VS = ±15V
15
10
5
0
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
LT1112/14 • TPC04
0
–1.4 –1.0 –0.6 –0.2 0.2 0.6 1.0 1.4
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
LT1112/14 • TPC05
Distribution of Input Bias Current
(In All Packages Except LT1114S)
30
VS = ±15V
TA = 25°C
20
10
0
–300 –200 –100 0 100 200 300
INPUT BIAS CURRENT (pA)
LT1112/14 • TPC03
Distribution of Offset Voltage at
VS = ±1.0V (In All Packages)
30
TA = 25°C
25
20
15
10
5
0
–80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
LT1112/14 • TPC06
111214fb
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