LTC3548 Datasheet, PDF (13/16 Pages) Linear Technology – Dual Synchronous, 400mA/800mA, 2.25MHz Step-Down DC/DC Regulator

LTC3548
APPLICATIO S I FOR ATIO
V_IN = 2.5V*
TO 5.5V
C1
10µF
V_OUT2 = 2.5V*
AT 400mA
L2
4.7µH
C5, 68pF
RUN2 V_IN RUN1
MODE/SYNC POR
LTC3548
SW2
SW1
R5
100k
POWER-ON
RESET
L1
2.2µH
C4, 33pF
C3
4.7µF
R4
887k R3
280k
V_FB2
V_FB1
GND
R2
R1 604k
301k
C1, C2, C3: TAIYO YUDEN JMK212BJ106MG
C3: TAIYO YUDEN JMK212BJ475MG
L1: MURATA LQH32CN2R2M11
L2: MURATA LQH32CN4R7M23
*V_OUT CONNECTED TO V_IN FOR V_IN ≤ 2.8V (DROPOUT)
V_OUT1 = 1.8V
AT 800mA
V_OUT2
V_IN
C_IN
RUN2 V_IN RUN1
MODE/SYNC
POR
LTC3548
L2
L1
SW2
SW1
C5
C4
C2
10µF
3548 F03
R4
C_OUT2
V_FB2
V_FB1
GND
R2
R3
R1
BOLD LINES INDICATE HIGH CURRENT PATHS
V_OUT1
C_OUT1
3548 F04
Figure 3. LTC3548 Typical Application
Figure 4. LTC3548 Layout Diagram (See Board Layout Checklist)
TYPICAL APPLICATIO S
Low Ripple Buck Regulators Using Ceramic Capacitors
V_IN = 2.5V
TO 5.5V
C1
10µF
V_OUT2 = 1.8V
AT 400mA
L2
10µH
C5, 68pF
RUN2 V_IN RUN1
POR
LTC3548
SW2
SW1
R5
100k
POWER-ON
RESET
L1
4.7µH
C4, 33pF
V_OUT1 = 1.2V
AT 800mA
C3
10µF
R4
887k R3
442k
V_FB2
V_FB1
MODE/SYNC GND
R2
R1 604k
604k
C2
10µF
C1, C2, C3: TDK C2012X5R0J106M
L1: SUMIDA CDRH2D18/HP-4R7NC
L2: SUMIDA CDRH2D18/HP-100NC
3548 TA03
Efficiency vs Load Current
100
95
1.8V
90
85
1.2V
80
75
70
65
60 _{VIN = 3.3V}
55 ^{PULSE SKIP MODE}
NO LOAD ON OTHER CHANNEL
50
10
100
LOAD CURRENT (mA)
1000
3548 TA03b
3548f
13