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LSJ689 Datasheet, PDF (1/6 Pages) Linear Integrated Systems – LOW NOISE LOW CAPACITANCE MONOLITHIC DUAL P-CHANNEL JFET AMPLIFIER | |||
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Three Decades of Quality Through Innovation
PRELIMINARY
LSJ689
LOW NOISE LOW CAPACITANCE
MONOLITHIC DUAL
P-CHANNEL JFET AMPLIFIER
FEATURES
ULTRA LOW NOISE
LOW INPUT CAPACITANCE
en = 2.0nV/âHz
Ciss = 8pF
Features
ï· Reduced Noise due
to process improvement
ï· Monolithic Design
ï· High slew rate
ï· Low offset/drift voltage
ï· Low gate leakage lgss & lg
ï· High CMRR 102 dB
Benefits
ï· Tight differential voltage match vs.
current
ï· Improved op amp speed settling time
accuracy
ï· Minimum Input Error trimming error
voltage
ï· Lower intermodulation distortion
Applications
ï· Wide band differential Amps
ï· High speed temperature
compensated single ended input
amplifier amps
ï· High speed comparators
ï· Impedance Converters
Description
The LSJ689 high performance, P-Channel, monolithic dual JFET features extremely low noise, tight offset voltage and low drift
over temperature. It is targeted for use in a wide range of precision instrumentation applications. The SOT-23, TO-71 and SO-8
packages provide ease of manufacturing and the symmetrical pinouts prevent improper orientation. The SOT-23 and SO-8
packages are available in tape and reel, compatible with automatic assembly methods. (See packaging data)
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
Junction Operating Temperature
Maximum Power Dissipation, TA = 25°C
Continuous Power Dissipation, per side 4
Power Dissipation, total 5
Maximum Currents
Gate Forward Current
Maximum Voltages
Gate to Source
Gate to Drain
-55 to +150°C
-55 to +150°C
300mW
500mW
IG(F) = -10mA
VGS = 50V
VGD = 50V
TO-71
TOP VIEW
SOIC-A
TOP VIEW
SOT-23
TOP VIEW
Linear Integrated Systems
⢠4042 Clipper Court ⢠Fremont, CA 94538 ⢠Tel: 510 490-9160 ⢠Fax: 510 353-0261
Doc 201180 06/13/16 Rev#A7 ECN# LSJ689
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