LSJ689 Datasheet, PDF (1/6 Pages) Linear Integrated Systems – LOW NOISE LOW CAPACITANCE MONOLITHIC DUAL P-CHANNEL JFET AMPLIFIER

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PRELIMINARY
LSJ689
LOW NOISE LOW CAPACITANCE
MONOLITHIC DUAL
P-CHANNEL JFET AMPLIFIER
FEATURES
ULTRA LOW NOISE
LOW INPUT CAPACITANCE
en = 2.0nV/√Hz
Ciss = 8pF
Features
 Reduced Noise due
to process improvement
 Monolithic Design
 High slew rate
 Low offset/drift voltage
 Low gate leakage lgss & lg
 High CMRR 102 dB
Benefits
 Tight differential voltage match vs.
current
 Improved op amp speed settling time
accuracy
 Minimum Input Error trimming error
voltage
 Lower intermodulation distortion
Applications
 Wide band differential Amps
 High speed temperature
compensated single ended input
amplifier amps
 High speed comparators
 Impedance Converters
Description
The LSJ689 high performance, P-Channel, monolithic dual JFET features extremely low noise, tight offset voltage and low drift
over temperature. It is targeted for use in a wide range of precision instrumentation applications. The SOT-23, TO-71 and SO-8
packages provide ease of manufacturing and the symmetrical pinouts prevent improper orientation. The SOT-23 and SO-8
packages are available in tape and reel, compatible with automatic assembly methods. (See packaging data)
ABSOLUTE MAXIMUM RATINGS¹
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
Junction Operating Temperature
Maximum Power Dissipation, TA = 25°C
Continuous Power Dissipation, per side ⁴
Power Dissipation, total ⁵
Maximum Currents
Gate Forward Current
Maximum Voltages
Gate to Source
Gate to Drain
-55 to +150°C
-55 to +150°C
300mW
500mW
IG(F) = -10mA
VGS = 50V
VGD = 50V
TO-71
TOP VIEW
SOIC-A
TOP VIEW
SOT-23
TOP VIEW
Linear Integrated Systems
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Doc 201180 06/13/16 Rev#A7 ECN# LSJ689