LS840_14 Datasheet, PDF (1/2 Pages) Linear Integrated Systems – LOW NOISE LOW DRIFT LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET AMPLIFIER

LS840 LS841 LS842
LOW NOISE LOW DRIFT
LOW CAPACITANCE
MONOLITHIC DUAL
N-CHANNEL JFET AMPLIFIER
FEATURES
LOW NOISE
en=8nV/Hz TYP.
LOW LEAKAGE
IG=10pA TYP.
LOW DRIFT
I VGS1-2/TI=5µV/ºC max.
LOW OFFSET VOLTAGE
IVGS1-2I=2mV TYP.
ABSOLUTE MAXIMUM RATINGS¹
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
-55°C to +150°C
Operating Junction Temperature
-55°C to +150°C
Maximum Voltage and Current for Each Transistor¹
-VGSS Gate Voltage to Drain or Source 60V
IG(f) Gate Forward Current
Maximum Power Dissipation
10mA
Device Dissipation² @ Free Air - Total 400mW TA=+25°C
SOIC
TOP VIEW
TO-71/78
TOP VIEW
ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise noted)
SYMBOL
CHARACTERISTIC
LS840 LS841 LS842 UNITS
I VGS1-2 / TI max. Drift vs. Temperature
5
10 40 µV/ºC
IVGS1-2I max.
Offset Voltage
5
10 25 mA
CONDITIONS
VDG = 20V
TA = -55ºC to +125ºC
VDG = 20V
ID = 200µA
ID = 200µA
SYMBOL
BVGSS
BVGGO
Gfss
Gfs
Gfs1│⁴
Gfs2│
IDSS
IDSS1│⁴
IDSS2│
VGS(off)
VGS
-IG
-IG
-IG
-IGSS
CHARACTERISTIC³
Breakdown Voltage
Gate-to-Gate Breakdown
TRANSCONDUCTANCE
Full Conduction
Typical Conduction
Mismatch Transconductance
Ratio
DRAIN CURRENT
Full Conduction
Drain Current Ratio
GATE-SOURCE
Pinchoff Voltage
Operating Range
GATE CURRENT
Operating
High Temperature
Reduced VDG
At Full Conduction
MIN.
-60
±60
TYP.
--
--
MAX. UNITS
--
V
--
V
CONDITIONS
VDS= 0
ID= -1nA
IGGO= ±1µA ID= 0
IS = 0
1000
500
0.97
4000 µS VDG= 20V VGS= 0 f = 1kHz
1000 µS VDG= 20V ID= 200µA
1.0
0.5
2
5
mA _{VDG= 20V VGS= 0}
0.95
1.0
-1
-2 -4.5
V
VDS= 20V ID= 1nA
-0.5 --
-4
V
VDS= 20V ID= 200µA
--
10
50
pA VDG= 20V ID =200µA
--
--
50
nA VDG= 20V ID =200µA TA=+125ºC
--
5
--
pA VDG= 10V ID =200µA
--
--
100
pA VDG= 20V VDS =0
Linear Integrated Systems
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Doc 201143 05/21/2014 Rev#A8 ECN# LS840 LS841 LS842