LS4117-9 Datasheet, PDF (1/1 Pages) Linear Integrated Systems – ULTRA-HIGH INPUT IMPEDANCE N-CHANNEL JFET

Linear Integrated Systems
LS4117, 4118, 4119
ULTRA-HIGH INPUT IMPEDANCE
N-CHANNEL JFET
FEATURES
LOW POWER
I_DSS<90 µA (2N4117)
MINIMUM CIRCUIT LOADING
I_GSS<1 pA (2N4117A Series)
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
@ 25°C (unless otherwise noted)
Gate-Source or Gate-Drain Voltage (NOTE 1) -40V
Gate-Current
50mA
Total Device Dissipation
(Derate 2mW/°C to 175°C)
Storage Temperature Range
Lead Temperature
(1/16" from case for 10 seconds)
300mW
-65°C to +175°C
255°C
G
D
2
1
S_D
Case
G
3
4
SC
TO-72
Bottom View
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
2N4117/A
2N4118
FN4117/A
2N4118A
SYMBOL
CHARACTERISTICS
MIN MAX MIN MAX
I_GSS
Gate Reverse Current
Standard only
-- -10 -- -10
-- -25 -- -25
I_GSS
Gate Reverse Current
"A" Series only
--
-1 --
-1
-- -2.5 -- -2.5
BV_GSS Gate-Source Breakdown Voltage -40
-- -40
--
V_GS(off) Gate-Source Cutoff Voltage
-0.6 -1.8 -1
-3
I_DSS
Saturation Drain Current
0.03 0.09 0.08 0.24
(NOTE 2)
FN4117/A 0.015
g_fs
Common-Source Forward
70 210 80 250
Transconductance (NOTE 2)
g_os
Common-Source Output
Conductance
--
3
--
5
C_iss
Common-Source Input
Capacitance
--
3
--
3
C_rss
Common-Source Reverse
Transfer Capacitance
--
1.5 --
1.5
2N4119
2N4119A
MIN MAX
-- -10
-- -25
-- -1
-- -2.5
-40 --
-2 -6
0.20 0.60
100 330
-- 10
--
3
-- 1.5
UNITS
pA
nA
pA
nA
V
mA
µmho
pF
CONDITIONS
V_GS= -20V V_DS= 0
V_GS=-20V V_DS= 0
I_G=-1µA
V_DS=10V
V_DS=10V
V_DS= 0
I_D= 1nA
V_GS= 0
150°C
150°C
f=1kHz
V_DS= 10V V_GS= 0
f=1MHz
NOTES:
1. Due to symmetrical geometry, these units may be operated with source and drain leads interchanged.
2. This parameter is measured during a 2 ms interval 100 ms after power is applied. (Not a JEDEC condition.)
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