2N5018_13 Datasheet, PDF (1/2 Pages) Linear Integrated Systems – SINGLE P-CHANNEL JFET SWITCH

2N5018 SERIES
SINGLE P-CHANNEL
JFET SWITCH
FEATURES
DIRECT REPLACEMENT FOR SILICONIX 2N5018
ZERO OFFSET VOLTAGE
LOW ON RESISTANCE
75Ω
ABSOLUTE MAXIMUM RATINGS¹
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
Junction Operating Temperature
Maximum Power Dissipation
Continuous Power Dissipation³
Maximum Currents
Gate Current
Maximum Voltages
Gate to Drain
Gate to Source
-55 to 150°C
-55 to 150°C
500mW
-10mA
30V
30V
TO-18
TOP VIEW
S
G
D
and Case
STATIC ELECTRICAL CHARACERISTICS @25ºC (unless otherwise stated)
SYM. CHARACTERISTIC
2N5018
2N5019
TYP
MIN MAX MIN MAX
BVGSS Gate to Source Breakdown Voltage
30
30
VGS(off) Gate to Source Cutoff Voltage
10
5
VDS(on) Drain to Source On Voltage
-0.5
-0.5
IDSS Drain to Source Saturation Current²
-10
-5
IGSS Gate Leakage Current
2
2
ID(off) Drain Cutoff Current
-10
-10
-10
IDGO Drain Reverse Current
-2
-2
rDS(on) Drain to Source On Resistance
75
150
UNITS
V
mA
nA
µA
nA
Ω
CONDITIONS
IG = 1µA, VDS = 0V
VDS = -15V, ID = -1µA
VGS = 0V, ID = -6mA
VGS = 0V, ID = -3mA
VDS = -20V, VGS = 0V
VGS = 15V, VDS = 0V
VDS = -15V, VGS = 12V
VDS = -15V, VGS = 7V
VDG = -15V, IS = 0A
ID = -1mA, VGS = 0V
Linear Integrated Systems
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Doc 201153 05/14/2014 Rev#A4 ECN# 2N5018