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ISPLSI1016EA_07 Datasheet, PDF (5/13 Pages) Lattice Semiconductor – In-System Programmable High Density PLD
Specifications ispLSI 1016EA
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time 10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
3-state levels are measured 0.5V from
steady-state active level.
GND to 3.0V
1.5ns
1.5V
1.5V
See Figure 3
Table 2-0003/1016EA
Figure 3. Test Load
Device
Output
+ 5V
R1
Test
Point
* Output Load Conditions (see Figure 3)
W TEST CONDITION
E A
* N Active High
B
Active Low
R Active High to Z
C at VOH -0.5V
O Active Low to Z
F at VOL+0.5V
R1
470Ω
∞
470Ω
∞
R2
390Ω
390Ω
390Ω
390Ω
CL
35pF
35pF
35pF
5pF
470Ω
390Ω 5pF
Table 2-0004/1016E
R2
CL
CL includes Test Fixture and Probe Capacitance.
0213a
5 S DC Electrical Characteristics
4A N Over Recommended Operating Conditions
H IG SYMBOL
PARAMETER
CONDITION
MIN. TYP.3
C S VOL Output Low Voltage
E VOH Output High Voltage
A D IIL
Input or I/O Low Leakage Current
pM V IIH
Input or I/O High Leakage Current
is 5 IIL-PU
IOS1
I/O Active Pull-Up Current
Output Short Circuit Current
SE ICC2, 4, 5 Operating Power Supply Current
IOL = 8 mA
IOH = -2 mA, VCCIO = 3.0V
IOH = -4 mA, VCCIO = 4.75V
0V ≤ VIN ≤ VIL (Max.)
(VCCIO - 0.2)V ≤ VIN ≤ VCCIO
VCCIO ≤ VIN ≤ 5.25V
0V ≤ VIN ≤ VIL
VCCIO = 5.0V or 3.3V, VOUT = 0.5V
VIL = 0.0V, VIH = 3.0V
fTOGGLE = 1 MHz
—
—
2.4
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2.4
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—
—
—
—
—
—
—
—
—
—
—
91
U 1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test
MAX. UNITS
0.4
V
—
V
—
V
-10 μA
10 μA
10 μA
-200 μA
-240 mA
— mA
Table 2-0007/1016EA
problems by tester ground degradation. Characterized but not 100% tested.
2. Measured using four 16-bit counters.
3. Typical values are at VCC = 5V and TA = 25°C.
4. Unused inputs held at 0.0V.
5. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to the
Power Consumption section of this data sheet and the Thermal Management section of the Lattice Semiconductor
Data Book CD-ROM to estimate maximum ICC.
5