GAL22V10D-15QPN Datasheet, PDF (11/23 Pages) Lattice Semiconductor – All Devices Discontinued

SpSepceifcicifaictaiotinosnsGGALA2L22V21V01D0
AC Switching Characteristics
Over Recommended Operating Conditions
COM / IND COM / IND
IND
COM / IND
PARAM.
TEST
COND.¹
DESCRIPTION
tpd
A Input or I/O to Comb. Output
-10
-15
-20
-25
UNITS
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
1 10 3 15 3 20 3 25 ns
tco
A Clock to Output Delay
tcf²
— Clock to Feedback Delay
tsu
— Setup Time, Input or Fdbk before Clk↑
S _th
— Hold Time, Input or Fdbk after Clk↑
A Maximum Clock Frequency with
E External Feedback, 1/(tsu + tco)
1 7 2 8 2 10 2 15 ns
— 2.5 — 2.5 — 8 — 13 ns
6—
0—
83.3 —
10 — 12 — 15 —
0— 0 — 0 —
55.5 — 41.6 — 33.3 —
ns
ns
MHz
D _fmax3
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
110 — 80 — 45.4 — 35.7 — MHz
IC E A Maximum Clock Frequency with
No Feedback
125 — 83.3 — 50 — 38.5 — MHz
V ^{U twh}
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
E _IN ^ten
B Input or I/O to Output Enabled
tdis
C Input or I/O to Output Disabled
D ^tar
A Input or I/O to Asynch. Reset of Reg.
T _{tarw — Asynch. Reset Pulse Duration}
tarr
— Asynch. Reset to Clk↑ Recovery Time
L ^N _tspr
— Synch. Preset to Clk↑ Recovery Time
4 — 6 — 10 — 13 — ns
4 — 6 — 10 — 13 — ns
1 10 3 15 3 20 3 25 ns
1 9 3 15 3 20 3 25 ns
1 13 3 20 3 25 3 25 ns
8 — 15 — 20 — 25 — ns
8 — 10 — 20 — 25 — ns
8 — 10 — 14 — 15 — ns
1) Refer to Switching Test Conditions section.
L _{O 2) Calculated from fmax with internal feedback. Refer to fmax Description section.}
3) Refer to fmax Description section.
A _{C Capacitance (TA = 25°C, f = 1.0 MHz)}
SYMBOL
PARAMETER
IS ^CI
Input Capacitance
C_I/O
I/O Capacitance
D ^{*Characterized but not 100% tested.}
MAXIMUM*
8
8
UNITS
pF
pF
TEST CONDITIONS
V_CC = 5.0V, V_I = 2.0V
V_CC = 5.0V, V_I/O = 2.0V
9