ISPPAC81 Datasheet, PDF (1/20 Pages) Lattice Semiconductor – In-System Programmable Analog Circuit

ispPAC81
In-System Programmable Analog Circuit
October 2001
Data Sheet
Features
■ In-System Programmable(ISP™) Analog
• Instrument Amplifier Gain Stage
• Precision Active Filtering (10kHz to 75kHz)
• Continuous-Time Fifth Order Low Pass Topology
• Dual, A/B Configuration Memory
• Non-Volatile E²CMOS^® Cells
• IEEE 1149.1 JTAG Serial Port Programming
■ Unique Flexibility and Performance
• Programmable Gain Range (0dB to 20dB)
• Implements Multiple Filter Types: Elliptical,
Chebyshev, Butterworth
• Low Distortion (THD < -80dB at 10kHz)
• Auto-Calibrated Input Offset Voltage
■ True Differential I/O
• High CMR Instrument Amplifier Input
• 2.5V Common Mode Reference on Chip
• Rail-to-Rail Voltage Outputs
■ Single Supply 5V Operation
• Power Dissipation of 133mW
• 16-Pin Plastic SOIC, PDIP Packages
■ Applications Include Integrated
• Single +5V Supply Signal Conditioning
• Programmable Filters With Fully Differential I/O
• Analog Front Ends, 12-Bit Data Acq. Systems
• DSP System Front End Signal Conditioning
• High-Performance Reconstruction Filters
Typical Application Diagram
5V
5V
ispPAC81
Vin
12-Bit Differential
Input ADC
Ain+
Ain-
A/B & Gain
SPI Control
VREFout
Reference
5V
DSP
Functional Block Diagram
TMS 1
TCK 2
TDI 3
TDO 4
CS 5
CAL 6
ENSPI 7
GND 8
IA
OA
5th Order LPF
E2CMOS Cfg A E2CMOS Cfg B
Ref & Auto-Cal
ISP Control
16 VS
15 TEST
14 OUT+
13 OUT–
12 TEST
11 IN+
10 IN–
9 VREFOUT
ispPAC81
Description
The ispPAC81 is a member of the Lattice family of In-System
Programmable analog circuits, digitally configured via nonvol-
atile E²CMOS technology.
Analog building blocks, called PACell™(s), replace traditional
analog components such as opamps, eliminating the need for
external resistors and capacitors. With no requirement for
external configuration components, ispPAC81 expedites the
design process, simplifying prototype circuit implementation
and change, while providing high-performance integrated
functionality. With all components on chip, there is no longer a
concern of performance degradation due to component mis-
match or other external factors. The ispPAC81 provides reli-
able and repeatable performance, every time.
Designers configure the ispPAC81 and verify its performance
using PAC-Designer^®, an easy-to-use, Microsoft Windows^®
compatible program. A filter configuration database is pro-
vided whereby thousands of different configurations can be
realized. No special understanding of filter synthesis is
required beyond that of general specifications such as corner
frequency and stopband attenuation, etc. The software lists
the possible choices that meet the designer’s specifications
which can then be loaded directly into either of two device (A/
B) configurations from the lookup table. Device programming
is supported using PC parallel port I/O operations.
The ispPAC81 is configured through its IEEE Standard 1149.1
compliant serial port. The flexible In-System Programming
capability enables programming, verification and reconfigura-
tion, if desired, directly on the printed circuit board.
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