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ISPMACH4000V Datasheet, PDF (1/99 Pages) Lattice Semiconductor – 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs | |||
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ispMACH® 4000V/B/C/Z Family
3.3V/2.5V/1.8V In-System Programmable
November 2007
Coolest Power
SuperFASTTM High Density PLDs
Data Sheet DS1020
Features
C
TM
â Broad Device Offering
â High Performance
⢠fMAX = 400MHz maximum operating frequency
⢠tPD = 2.5ns propagation delay
⢠Up to four global clock pins with programmable
⢠Multiple temperature range support
â Commercial: 0 to 90°C junction (Tj)
â Industrial: -40 to 105°C junction (Tj)
â Extended: -40 to 130°C junction (Tj)
⢠For AEC-Q100 compliant devices, refer to
clock polarity control
LA-ispMACH 4000V/Z Automotive Data Sheet
⢠Up to 80 PTs per output
â Ease of Design
â Easy System Integration
⢠Superior solution for power sensitive consumer
⢠Enhanced macrocells with individual clock,
applications
reset, preset and clock enable controls
⢠Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
⢠Up to four global OE controls
⢠Operation with 3.3V (4000V), 2.5V (4000B) or
⢠Individual local OE control per I/O pin
⢠Excellent First-Time-FitTM and reï¬t
⢠Fast path, SpeedLockingTM Path, and wide-PT
1.8V (4000C/Z) supplies
⢠5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
interfaces
path
⢠Hot-socketing
⢠Wide input gating (36 input logic blocks) for fast
⢠Open-drain capability
counters, state machines and address decoders
⢠Input pull-up, pull-down or bus-keeper
â Zero Power (ispMACH 4000Z) and Low
⢠Programmable output slew rate
Power (ispMACH 4000V/B/C)
⢠3.3V PCI compatible
⢠Typical static current 10µA (4032Z)
⢠IEEE 1149.1 boundary scan testable
⢠Typical static current 1.3mA (4000C)
⢠3.3V/2.5V/1.8V In-System Programmable
⢠1.8V core low dynamic power
(ISPâ¢) using IEEE 1532 compliant interface
⢠ispMACH 4000Z operational down to 1.6V VCC
⢠I/O pins with fast setup path
⢠Lead-free package options
Table 1. ispMACH 4000V/B/C Family Selection Guide
ispMACH
4032V/B/C
ispMACH
4064V/B/C
ispMACH
4128V/B/C
ispMACH
4256V/B/C
ispMACH
4384V/B/C
Macrocells
32
64
128
256
384
I/O + Dedicated Inputs 30+2/32+4
30+2/32+4/
64+10
64+10/92+4/ 64+10/96+14/ 128+4/192+4
96+4
128+4/160+4
tPD (ns)
tS (ns)
tCO (ns)
fMAX (MHz)
Supply Voltages (V)
2.5
1.8
2.2
400
3.3/2.5/1.8V
2.5
1.8
2.2
400
3.3/2.5/1.8V
2.7
1.8
2.7
333
3.3/2.5/1.8V
3.0
2.0
2.7
322
3.3/2.5/1.8V
3.5
2.0
2.7
322
3.3/2.5/1.8V
Pins/Package
44 TQFP
48 TQFP
44 TQFP
48 TQFP
100 TQFP
100 TQFP
128 TQFP
144 TQFP1
100 TQFP
144 TQFP1
176 TQFP
256 ftBGA2/
fpBGA2, 3
176 TQFP
256 ftBGA/
fpBGA3
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O conï¬gurations.
3. Use 256 ftBGA package for all new designs. Refer to PCN#14A-07 for 256 fpBGA package discontinuance.
ispMACH
4512V/B/C
512
128+4/208+4
3.5
2.0
2.7
322
3.3/2.5/1.8V
176 TQFP
256 ftBGA/
fpBGA3
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The speciï¬cations and information herein are subject to change without notice.
www.latticesemi.com
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DS1020_23.0
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