MR45V064B Datasheet, PDF (1/20 Pages) LAPIS Semiconductor Co., Ltd. – 64k(8,192-Word × 8-Bit) FeRAM (Ferroelectric Random Access Memory) SPI

MR45V064B
64k(8,192-Word × 8-Bit) FeRAM (Ferroelectric Random Access Memory) SPI
FEDR45V064B-01
Issue Date: Jan 08, 2016
GENERAL DESCRIPTION
The MR45V064B is a nonvolatile 8,192-word x 8-bit ferroelectric random access memory (FeRAM) developed
in the ferroelectric process and silicon-gate CMOS technology. The MR45V064B is accessed using Serial
Peripheral Interface.Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required
to hold data. This device has no mechanisms of erasing and programming memory cells and blocks, such as
those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and the
power consumption during a write can be reduced significantly.
The MR45V064B can be used in various applications, because the device is guaranteed for the write/read
tolerance of 10¹² cycles per bit and the rewrite count can be extended significantly.
FEATURES
• 8,192-word × 8-bit configuration (Serial Peripheral Interface : SPI)
• A single 1.8V to 3.6V （3.3 V typ） power supply
• Operating frequency:
• Read/write tolerance
40MHz
10¹² cycles/bit
• Data retention
10 years
• Guaranteed operating temperature range
−40 to 85°C (Extended temperature version)
• Package options:
8-pin plastic SOP (P-SOP8-200-1.27-T2K)
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