ML7125-001 Datasheet, PDF (1/33 Pages) LAPIS Semiconductor Co., Ltd. – Bluetooth Smart LSI supporting Core Specification

ML7125-001/ML7125-002
Bluetooth^ Smart LSI supporting Core Specification v4.1
FEDL7125-04
Issue Date: April. 5, 2016
 Overview
ML7125-00X (-001/-002) is a series of Bluetooth^® Smart LSI integrating Ultra Low Power RF, Baseband,
microproccessor core and peripherals, which has Bluetooth^® LE compliant 2.4GHz band radio
communication capability. ML7125-00X is supporting Bluetooth^® core specification v4.1, it is suitable for
applications such as Wrist Watch, Remote Controller or PC peripherals. The differences in ML7125-00X
series are operating mode that is supported by each product.
 Features
 Bluetooth^® SIG Core Spec v4.1 compliant, supporting master and slave role function
 Ultra Low Power RF block
 Cortex-M0+ microprocessor core integrated
 96KB ROM (CODE_ROM) for Program code.
 28KB RAM (CODE/DATA_RAM) for user program and data processing
 Memory retention function while the chip is in deep sleep mode with partial power shutdown
(8KB/28KB scalable)
 Bluetooth^® LE single mode compliant Baseband controller
 3 Operating modes
 BACI (Bluetooth Application Controller Interface) mode : Lapis original application interface to
HOST MCU.*1
 HCI (Host Controller Interface) mode : Bluetooth^® standard interface between controller
(LL+RF-PHY) and protocol stack.
 Application mode : Download user application into embedded SRAM, two type of application
are supported, “Standalone type”, “Add-on type”. *2
 Simultaneous connection up to 2 devices. (support all master/slave combinations)*1
 UART interface
 SPI (Slave mode) interface *1
 I2C (Master & Slave) interface
 GPIO ports
 On chip Regulator Linear regulator (MAIN Regulator) or Switching regulator
 Low Power Operating mode
 Single power supply
1.6V to 3.6V
 Operating Temperature
-20 deg.C to +75deg.C
 Current Consumptions
 Deep Sleep Mode with external Low Power Clock
0.35A *3, 0.90A *4
 Deep Sleep Mode with internal Low Power Clock oscillator circuit)
2.60A(TYP) *3, 3.15A(TYP) *4
 Idle Mode
below 2.0mA(TYP) (Memory retention, 26MHz clock enabled)
 Active TX
below 6.7mA(TYP) (power supply using Switching regulator)
 Active RX
below 6.2mA(TYP) (power supply using Switching regulator)
 Package
7row x 10column pad WCSP (0.4mm pad pitch LGA type, 4.69 x 3.12)
 Pb Free, RoHS compliant
*1 : Supported by ML7125-001 only
*2 : Supported by ML7125-002 only
*3 : APPLICATION RAM no retention
*4 : APPLICATION RAM retention
Note : Unless otherwise stated, features listed above supported by both
products.(*1*2)
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