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ML610Q793 Datasheet, PDF (1/24 Pages) List of Unclassifed Manufacturers – 8-bit Microcontroller for Sensor Control
ML610Q793
8-bit Microcontroller for Sensor Control
FEDL610Q793-02
Issue Date: Jan. 26, 2015
■ General Description
The ML610Q793 is a high-performance 8-bit low power microcontroller optimized for sensor hub, that integrates LAPIS
Semiconductor’s original high-performance 8-bit CPU core with a 16-bit multiplier/divider co-processor, 64 KByte flash
memory, 4 KByte RAM, multiple interfaces for various sensors and host interfaces with 8KByte logging RAM in small
footprint package. The ML610Q793 is an ideal sensor hub microcontroller for smart phone to separate various sensors off from
its application processor and control them effectively for reducing total system power consumption.
■ Features
● CPU
—8-bit RISC CPU (CPU name: uX-U8/100)
—16-bit length instruction system
—Minimum instruction execution time
30.5 us (32.768 kHz system clock)
0.25 us (4.096 MHz system clock)
—Built-in coprocessor for multiplication, division, and multiply-accumulate operations
Multiplication (Input: 16-bit x 16-bit, Output: 32-bit)
Division (Input: 32-bit/16-bit, Output: 32-bit)
Multiply-accumulate (Input: 16-bit x 16-bit + 32-bit, Output: 32-bit)
● Internal memory
—64KByte Flash ROM (32KWord x 16-bit)
—4KByte SRAM (4KWord x 8-bit)
● Interrupt controller
—Non-maskable interrupt: 1 source
—Maskable interrupt: 29 sources
Number of internal sources: 13 (Timer: 6, ADC: 1, SPI: 1, I2C: 1, HOSTIF: 1, Arithmetic
circuit: 1, UART: 1, SIO: 1)
Number of external sources: 16
● Timer
—8 bits timer x 6 ch (also 16 bits x 3ch configuration is available by using Timer 0 and 1,
Timer 2 and 3, or Timer 4 and 5)
—Watchdog timer (WDT) x 1ch
● Serial interface
—SPI interface with master function x 1ch
—I2C interface with master function x 1ch
—UART interface (two-wire, full duplex communication) x 1ch
—SIO interface (two-wire, half-duplex communication) x 1ch
● Host interface
—Serial interface with slave function (SPI/I2C selectable) x 1ch
—Host processor interrupt
—8KByte RAM for logging
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