ML33111 Datasheet, PDF (9/12 Pages) LANSDALE Semiconductor Inc. – Low Voltage Compander Silicon Monolithic Integrated Circuit

ML33111
Figure 16. Expander
LANSDALE Semiconductor, Inc.
40 k
VCC
14
Input
15 k
Iref
Rectifier
ICONTROL
∆ Gain
20 k
Vb
11
1.0 µF
15
Output
Expander
The expander is an noninverting amplifier with a fixed feed-
back resistor and a variable gain cell in its input path as shown
in Figure 16.
The input signal is sampled by the precision rectifier which,
in turn, supplies a DC signal (ICONTROL), representative of
the AC input signal, to the variable gain cell. The reference cur-
rent (IREF) is an internally generated precision current. The
effective impedance of the variable gain cell varies with the
ratio of the two currents, and decreases as ICONTROL increas-
es, thereby providing expansion. The output is related to the
input by the following equation (Vin and Vout are rms volts):
Vout = 10 x (Vin)2
(3)
In terms of dB levels, the relationship is:
Vo(dB) = 2.0 x Vi(dB)
(4)
where 0 dB = 100 mVrms (See Figures 3 and 4).
The input and output are internally biased at Vb (≈ +1.5 V), and
must therefore be capacitor coupled to external circuitry. The input
impedance at Pin 14 is nominally 10.9 kΩ (±20%), and the maxi-
mum functional input signal is listed in the Recommended
Operating Conditions table. Bias currents required by the op amp
and the variable gain cell are internally supplied. Due to clamp
diodes at the input (to VCC and ground), the input signal must be
maintained between the supply rails. If the input signal goes more
than 0.5 V above VCC or below ground, excessive currents will
flow, and distortion will show up at the output, and possibly in other
parts of the circuit.
The output of the rectifier is filtered by the capacitor at Pin 11,
which, in conjunction with an internal 20 k resistor, provides the
time constant for the attack and decay times. The attack and decay
times listed in the Electrical Characteristics were determined using
the test procedure defined in EIA-553. Figure 10 indicates how the
times vary with the capacitor value. If the attack and decay times
are decreased by using a smaller capacitor, performance at low fre-
quencies will degrade.
Op Amps
The two op amps (at Pins 6, 7, 9, and 10) are identical and
can be used for peripheral functions, such as a microphone
amplifier, buffer, filter, etc. They have an open loop gain of
≈100 dB, and a bandwidth of ≈ 300 kHz. The noninverting
inputs are internally biased at Vb (≈ +1.5 V). The inverting
inputs (Pins 7, 9) require a bias current of ≈ 8.0 nA, which
flows into the pin. The outputs can typically supply a maxi-
mum of 3.7 mA load current (see Electrical Characteristics).
NOTE: If an op amp is unused, its output MUST be tied to
its input (Pin 6 to 7 and/or 9 to 10). Leaving an input open can
affect other portions of the IC.
Logic Inputs
The three inputs (Pins 4, 8, 12) provide for muting and
passthrough functions for the compressor and expander
according to the following truth table:
CM
(Pin 4)
0
1
X
0
EM
(Pin 12)
0
X
1
0
PT
(Pin 8)
0
X
X
1
Function
Normal Operation
Compressor Mute
Expander Mute
Passthrough
The logic section permits the compressor and expander to be
muted independently. The Passthrough control affects both sec-
tions simultaneously, but only if the Mute inputs are at a logic
level 0. If both the Passthrough and a Mute input are asserted,
the Mute will override the Passthrough. The logic controls do
not affect the two uncommitted op amps in any way.
Figure 17 depicts a typical logic input stage configuration,
and Figure 14 indicates the typical input current. The inputs’
threshold is ≈ +1.3 V, independent of VCC. An open input is
equivalent to a logic low, but good design practices dictate that
inputs should never be left open. The inputs must be kept with-
in the range of VCC and GND. If an input is taken more than
0.5 V above VCC or below GND excessive currents will flow,
and the device’s operation will be distorted.
Figure 17. Logic Input Stage
Pins
4, 8, 12
VCC
50 k
50 k
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