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KK74AC323 Datasheet, PDF (6/9 Pages) KODENSHI KOREA CORP. – 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Speed Silicon-Gate CMOS
KK74AC323
FUNCTION TABLE
Inputs
Response
Mode
Reset
Mode
Select
S2 S1
Output
Enables
OE1 OE2
Clock
Serial PA/ PB/ PC/ PD/ PE/ PF/ PG/ PH/ QA’ QH’
Inputs QA QB QC QD QE QF QG QH
DA DH
Reset L X L L L
X XLLLLLLL L L L
L LX L L
X XLLLLLLL L L L
L HH X X
Shift H L H H X
Right
H LH X H
H LH L L
Shift H H L H X
Left
H HL X H
H HL L L
Parallel H H H X X
Load
X XX
QA through QH=Z
LL
DX
Shift Right: QA through QH=Z;
DA FA; FA FB; etc
D QG
DX
Shift Right: QA through QH=Z;
DA FA; FA FB; etc
D QG
DX
Shift Right: DA FA =QA;
FA FB =QB; etc
D QG
XD
Shift Left: QA through QH=Z;
DH FH; FH FG; etc
QB D
XD
Shift Left: QA through QH=Z;
DH FH; FH FG; etc
QB D
XD
Shift Left: DH FH =QH;
FH FG =QG; etc
QB D
XX
Parallel Load:PN FN
PA PH
Hold
H LL H X
X X X Hold: QA through QH=Z; FN=FN PA PH
H LL X H
X X X Hold: QA through QH=Z; FN=FN PA PH
H L L L L X XX
Hold: QN =QH
PA PH
Z = high impedance
D = data on serial input
F = flip-flop (see Logic Diagram)
When one or both output controls are high the eight input/output terminals are disabled to the high-impedance state;
however, sequential operation or clearing of the register is not affected.
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